PCB Inspection Methods: Visual, AOI, X-Ray, ICT & FCT

PCB inspection is the set of optical and electrical checks — visual, AOI, X-ray, in-circuit test, and functional test — that catch assembly defects before a board ships. No single method finds everything. AOI photographs the surface and catches missing or misaligned parts and solder bridges, but it is blind under a BGA. X-ray sees those hidden joints, yet it cannot tell you the board actually works. ICT measures components and nets but needs test points and a fixture. Functional test confirms the product runs. The right quality inspection methods are layered, each catching what the previous one misses. This guide breaks down every method — what it catches, what it misses, what it costs — plus the IPC acceptance criteria and how to match an inspection strategy to your board and volume.

PCB Inspection Methods at a Glance

• Optical methods (visual, AOI, X-ray) verify physical solder and placement; electrical methods (ICT, flying probe, functional test) verify the board works. You usually need both.
• AOI catches roughly 90% of surface defects but cannot see under BGAs and QFNs — those hidden joints need X-ray.
• ICT runs 5–30 seconds per board but needs a $1,000–$20,000 fixture and designed-in test points; flying probe needs no fixture but takes 1–15 minutes, so it suits prototypes and low volume.
• IPC-A-610 accepts BGA ball voids up to about 25% of ball area; chasing zero voids wastes money and re-working a compliant joint often does more harm than the void.
• Decide the test plan during DFM review, not at quote stage — retrofitting test access later can force a board respin.

What Is PCB Inspection and Why One Method Isn’t Enough

PCB inspection is how an assembler proves a populated board meets its workmanship and electrical requirements before it leaves the line. It splits into two families that answer different questions. Optical and structural methods — manual visual, automated optical inspection (AOI), and X-ray — ask “is the solder and placement physically correct?” Electrical methods — in-circuit test (ICT), flying probe, and functional test — ask “does the board actually work?”

The single most common misconception is that AOI can replace electrical test. It cannot. A resistor can look perfectly placed and soldered to the camera and still be the wrong value or dead internally — the optics see shape, not function. The reverse is also true: a functional test can pass a board that has a marginal solder joint quietly degrading under it. That is why serious quality inspection methods are layered, with each stage catching the defects the others physically cannot.

PCB Inspection Methods Compared: Visual, AOI, X-Ray, ICT, FCT

Here is what each method does, in the order a board meets them on a typical line.

Manual Visual Inspection and Solder Paste Inspection

Manual visual inspection (MVI) — an operator with a microscope — still catches gross defects, wrong orientation, cosmetic issues, and conformal-coating coverage that automation misjudges, but it is subjective and too slow for fine-pitch volume. Solder paste inspection (SPI) runs right after stencil printing and before reflow, measuring paste volume, area, height, and registration. It is the cheapest place to catch a defect, because a print problem fixed here never becomes a soldering problem later.

Automated Optical Inspection (AOI)

Post-reflow AOI photographs the board with high-resolution cameras and compares it against a golden reference, flagging missing, misaligned, rotated, or wrong parts, tombstones, solder bridges, and insufficient or excess solder. It is fast and gives full surface coverage, and it catches roughly 90% of surface defects. Its hard limit is line-of-sight: it cannot see a solder joint hidden under a BGA, QFN, or LGA. 3D AOI adds height data and is less fooled by lighting and color than 2D, at higher cost.

X-Ray Inspection (AXI)

Automated X-ray inspection penetrates the package to reach the joints AOI cannot see. It images the hidden balls under a BGA, measures void area, and finds opens, bridges, head-in-pillow, internal cracks, and via voids. 2D transmission X-ray shows a void’s presence and rough area; 3D computed tomography (CT) reconstructs the joint from multiple angles to judge void location and catch defects 2D flattens out. The trade-off is speed and cost — X-ray is slower than AOI and needs trained operators — so it is targeted at BGAs, QFNs, HDI, and high-reliability work rather than every joint.

ICT, Flying Probe, and Functional Test

On the electrical side, ICT presses the board onto a bed-of-nails fixture that contacts every node at once and measures component values, shorts, opens, polarity, and net connectivity in seconds. Flying probe does the same class of electrical test with movable probes and no fixture, trading speed for flexibility. Boundary scan (JTAG) reaches buried digital nets under BGAs that no physical probe can touch. Functional test (FCT) powers the finished board and verifies it behaves correctly in a simulated version of its real job — the only method that catches firmware and system-level faults.

Method	What it catches	Key limitation	Best for
Visual (MVI)	Gross defects, orientation, cosmetics, coating coverage	Subjective, slow, misses fine-pitch	Spot checks, reviewing AOI flags
SPI	Paste volume, area, height, print registration	Only paste, before parts are placed	Catching print defects early
AOI	Missing/misaligned/wrong parts, bridges, solder amount	Blind under BGA/QFN; line-of-sight	Fast full-surface coverage post-reflow
X-ray (AXI)	Hidden BGA/QFN joints, voids, opens, internal cracks	Slow, costly, no electrical function	BGAs, QFNs, HDI, high-reliability
ICT	Component values, shorts/opens, polarity, nets	Needs test points + custom fixture	High-volume electrical test
Flying probe	Same electrical faults as ICT, fixtureless	Slow — minutes per board	Prototypes, low volume, NPI
Functional (FCT)	Powered, system, and firmware behavior	Does not isolate root cause	Final validation before shipment

Which Inspection Catches Which Defect (and Where It Fits the Line)

Each method owns a stage on the line and a class of defect. Build the inspection chain so a defect is caught at the earliest, cheapest point it can be.

1. Solder Paste Inspection after printing, before reflow — catches paste volume and registration errors while they are still cheap to fix.
2. AOI after reflow — catches placement and solder defects on every exposed joint across the whole board.
3. X-ray on hidden packages — catches BGA and QFN voids and opens that AOI cannot see.
4. ICT or flying probe — catches wrong values, dead parts, shorts, and opens electrically; boundary scan extends this to buried nets.
5. Functional test last — confirms the powered board does its job, catching firmware and system faults nothing upstream can.

The reason to push detection upstream is cost. A defect caught at SPI costs a few cents of rework; the same defect found at functional test costs roughly ten times more, and a defect that escapes to the field can cost a hundred times more once you add returns, diagnosis, and reputation. Each stage you skip moves your defects downstream to a more expensive stage.

Defect type	Primary detection	Line stage
Solder paste print error	SPI	Pre-reflow
Missing / misaligned / rotated part	AOI	Post-reflow
Solder bridge / insufficient solder	AOI	Post-reflow
Tombstone / billboard	AOI	Post-reflow
Hidden BGA / QFN void or open	X-ray	Post-reflow
Wrong value / dead component	ICT or flying probe	Electrical test
Buried digital net under a BGA	Boundary scan (JTAG)	Electrical test
Functional / firmware fault	Functional test	Final

A real example of skipping a stage: an EMS buyer we worked with specified AOI-only testing to hold down unit cost on a controller board with two BGAs. The boards passed the line and shipped, and weeks later the field returns started — intermittent opens under one BGA that an optical system can never see. Adding X-ray on the BGA sites caught the identical defect at the factory on the next build, at a fraction of the return cost. The cheap test plan was the expensive one.

ICT vs Flying Probe vs Functional Test: Cost, Speed, and Volume

The electrical methods overlap in what they catch but differ sharply in economics, and that is usually what decides the choice. ICT contacts every node simultaneously, so it tests a board in 5–30 seconds — but each board design needs its own bed-of-nails fixture, typically $1,000 to $20,000 depending on probe count, plus test points designed into the layout. Flying probe moves a few probes from point to point, so it needs no fixture and reprograms in hours, but a board can take 1–15 minutes, which throttles a high-volume line.

Method	Fixture / NRE	Speed per board	Best volume
ICT (bed-of-nails)	$1,000–$20,000 fixture	5–30 seconds	High — amortizes at ~10,000+
Flying probe	None	1–15 minutes	Prototypes, under ~1,000
Boundary scan (JTAG)	Low — no fixture	Seconds to minutes	Dense / BGA boards, any volume
Functional test (FCT)	Custom jig + development	Varies by system	Final validation, all volumes

The break-even is a volume calculation: the fixture cost has to be offset by ICT’s per-board savings. Below roughly a thousand units, flying probe almost always wins because there is no fixture to scrap when the design changes; above ten thousand, ICT’s seconds-per-board speed wins because flying probe cannot keep up with the line. Most teams run a hybrid — flying probe for first articles and pilot runs, ICT once the design freezes and volume ramps — then add functional test for final confidence. Ordering an ICT fixture for a 200-unit pilot, or running flying probe on a 100,000-unit program, is how money gets wasted at both ends.

IPC-A-610 and BGA Void Limits: How Inspection Results Are Judged

Inspection only means something against an acceptance standard. IPC-A-610, “Acceptability of Electronic Assemblies” (now in its 2024 revision, IPC-A-610H), is the most widely used, defining acceptable, process-indicator, and defect conditions for solder joints, placement, and board condition across Class 1, 2, and 3. Its companion J-STD-001 covers the soldering process requirements themselves.

BGA voids are where teams most often misread the data. The headline number is well known and surprisingly forgiving.

Void location / class	Acceptance limit (X-ray)
BGA ball, Class 2 (IPC-A-610)	≤ 25% of ball area
BGA ball, Class 3 (IPC-A-610)	Often the same ~25% line
Pad / interconnect interface (IPC-7095)	≤ 10% of ball area
High-reliability practice	Often < 10% at the interface

Two things matter more than the headline percentage. First, location: stress concentrates at the edges and the pad interface of a ball, so a 24% void in the center can be perfectly usable while a 15% void at the pad interface is the real risk — IPC-7095 exists to read location and void type, not just area. Second, measurement basis: 2D X-ray projects the whole joint volume onto a plane, so a “25% void” in a 2D image is a smaller volumetric fraction; 3D CT gives the true volume.

The honest engineering position is that chasing zero voids wastes money. Reliability data shows balls with 15–20% voiding often survive as many thermal cycles as near-void-free ones, and subjecting a board to extra reflow cycles to “fix” a compliant void grows intermetallics and damages the laminate and pads more than the void ever would — and most specs cap BGA sites at two to three rework cycles for exactly that reason. Inspection is a geometric measurement against the IPC criteria, not a reaction to an ugly image.

Common PCB Inspection Mistakes to Avoid

Hand this list to anyone setting an inspection plan or laying out a new board.

1. Relying on AOI alone. Optical inspection sees shape, not function — a perfectly soldered part can be the wrong value or dead. Pair it with electrical test.
2. Skipping X-ray on BGAs and QFNs. Those joints are invisible to cameras; without X-ray you are shipping hidden opens and voids untested.
3. Not designing in test points. ICT needs probe access planned before layout freeze; retrofitting it later is expensive and can force a respin. Add boundary scan for buried BGA nets.
4. Reading a void percentage without location. A 24% center void can pass while a 15% pad-interface void fails — judge by IPC-7095 location and type, not area alone.
5. Over-reworking compliant voids. Extra reflow cycles damage laminate and pads more than a 15% void does; respect the 2–3 cycle limit and the IPC accept line.
6. Matching the test to the wrong volume. ICT on a 200-unit pilot never amortizes; flying probe on a 100,000-unit run throttles the line. Pick by volume.
7. Specifying test as an afterthought. Decide the inspection and test plan during DFM review, not at quote stage, so the board is built to be testable.
8. Catching defects late. Run SPI before reflow — a paste defect fixed there costs cents; the same defect at functional test costs roughly ten times more.

Frequently Asked Questions About PCB Inspection

What are the main PCB inspection methods?

The core methods are manual visual inspection, solder paste inspection (SPI), automated optical inspection (AOI), X-ray inspection (AXI), in-circuit test (ICT), flying probe, boundary scan, and functional test. Optical methods verify physical solder and placement; electrical methods verify the board works. Most assemblers layer several to cover what each one misses.

What is the difference between AOI and X-ray inspection?

AOI uses cameras to check the visible surface — part placement, solder bridges, missing components. X-ray penetrates packages to reach hidden joints under BGAs and QFNs that cameras cannot see, measuring voids and opens. They inspect different layers of the same board, so high-reliability builds use both, not one or the other.

Can AOI replace ICT or functional test?

No. AOI verifies that parts look correctly placed and soldered, but it cannot confirm a component’s value or that the board powers up and runs. A part can pass AOI and be the wrong value or internally dead. Optical inspection and electrical test catch different failures and are not interchangeable.

How do I choose between ICT and flying probe testing?

By volume and stability. Flying probe needs no fixture and reprograms in hours, so it suits prototypes and runs under about a thousand units. ICT tests in seconds but needs a $1,000–$20,000 fixture and test points, so it pays off once the design is frozen and volume climbs into the thousands.

How are BGA solder joints inspected?

With X-ray, because the balls sit under the package where no camera or probe can reach. 2D X-ray shows void area and gross opens; 3D CT reconstructs each ball to judge void location and catch head-in-pillow. Acceptance is judged against IPC-A-610 and IPC-7095 void criteria.

What void percentage is acceptable in a BGA joint?

IPC-A-610 generally accepts a cumulative void area up to about 25% of the ball for Class 2, often the same for Class 3. IPC-7095 tightens the interconnect interface to roughly 10%. Location matters more than the raw number — a void at the pad interface is riskier than a larger central one.

What is the difference between ICT and functional test?

ICT is a structural test — it probes nodes to measure component values, shorts, and opens, finding manufacturing defects fast. Functional test powers the finished board and checks it behaves correctly in its real application, catching firmware and system faults. ICT tells you the board is built right; FCT tells you it works.

What IPC standard governs PCB inspection?

IPC-A-610, “Acceptability of Electronic Assemblies,” is the primary acceptance standard, with Class 1, 2, and 3 criteria. J-STD-001 covers soldering process requirements, IPC-7095 covers BGA design and void interpretation, and IPC-A-600 covers bare-board acceptability. Together they define what “pass” means at inspection.

Building the Right PCB Inspection Strategy for Your Board

Good PCB inspection is not one machine — it is a layered plan matched to your board and volume. Use AOI for full-surface coverage, add X-ray wherever a BGA or QFN hides its joints, choose flying probe for prototypes and ICT for volume, finish with functional test, and judge the results against IPC-A-610 and IPC-7095 rather than against an ugly X-ray image. Most importantly, set the plan during design review so the board is built to be tested, not patched afterward. Do that and defects get caught at the cheap end of the line instead of in a customer’s hands.

Send us your Gerber, BOM, and target volume, and we will map an inspection and test plan — AOI, X-ray, ICT, and functional — to your board in a DFM review and quote.

Standards reference: IPC-A-610, J-STD-001, IPC-7095, and IPC-A-600 are published by IPC.