Solder Joint Defects: 25 Common SMT Defects, Causes & Fixes

Solder joint defects are flaws in the metallurgical bond between a component lead and a PCB pad, and they sit behind most electronics field failures — from intermittent resets to dead boards returned months after they passed final test. The three that cause the most pain are the cold solder joint (solder that never fully melted), tombstoning (a chip resistor standing on end), and solder bridging (two pads shorted by stray solder). IPC-A-610, the industry acceptance standard, draws the line between a cosmetic blemish and a true reject. This guide catalogs 25 of the most common SMT solder defects: what each one looks like under magnification, why it forms, and exactly how to fix and prevent it on your line.

Key Takeaways

• Most solder joint defects trace back to four process stages: solder paste printing, component placement, the reflow profile, and incoming material or oxidation.
• Cold joints, tombstoning, and bridging are the highest-frequency SMT defects; voids and head-in-pillow are the most dangerous because they pass initial test and fail in the field.
• IPC-A-610 accepts BGA solder voids up to 25% of the ball area — a limit that surprises most engineers the first time they hear it.
• AOI catches surface defects (bridges, missing or shifted parts); X-ray is the only way to inspect under BGAs and QFNs.
• Prevention beats rework: symmetric pads, a profiled oven (board-to-board ΔT under 5 °C), and baked moisture-sensitive parts eliminate most defects before they happen.

What Are Solder Joint Defects?

A solder joint defect is any deviation in a soldered connection that weakens it electrically, mechanically, or both. A healthy SMT joint has three signatures: the solder has wetted both the pad and the lead (it spreads and feathers out instead of balling up), it forms a smooth concave fillet, and a thin intermetallic compound (IMC) layer — typically 1–3 µm of Cu₆Sn₅ — has grown at the interface. That IMC layer is the actual metallurgical bond. No IMC, no joint, no matter how much solder is sitting on the pad.

Defects fall into three buckets by how they fail. Open-circuit defects (cold joints, insufficient solder, tombstoning, non-wetting) break continuity. Short-circuit defects (bridges, solder balls, webbing) create connections that shouldn’t exist. And hidden reliability defects (voids, head-in-pillow, cracks, IMC embrittlement) pass initial testing, then fail in the field under thermal cycling or vibration — the most expensive category, because they ship. The whole point of inspection and IPC acceptance criteria is to catch all three before the board leaves the building.

The 25 Most Common Solder Joint Defects (Causes & Fixes)

Here is the field guide. Each entry lists the visual signature, the root cause that actually drives the defect, and the fix or prevention that works. They are grouped by failure mode so you can jump straight to what you are seeing on the board.

Insufficient-Solder and Open-Circuit Defects

1. Cold solder joint — Dull, grainy, rough surface with a poorly formed fillet; the solder looks like it sat on the pad instead of flowing into it. It forms when the joint never reaches the alloy’s liquidus temperature — SAC305 needs about 217 °C just to melt and a 235–250 °C peak to wet properly — so no IMC layer develops. Common triggers: a cold or oxidized iron tip, a heavy ground plane sinking heat away from the joint, or an under-cooked reflow profile. Fix by reflowing with fresh flux and enough heat to fully melt the alloy, and add thermal relief to pads tied to large copper pours.

2. Insufficient solder — A thin, starved joint whose fillet doesn’t climb the lead. Mechanically weak and prone to cracking under vibration. Usually a paste-printing problem: a clogged or undersized stencil aperture, low area ratio, or paste slump. Fix the stencil (aperture, thickness, area ratio at or above 0.66) and verify deposit volume with SPI before the parts go down.

3. Non-wetting — Solder contacts the surface but refuses to spread or bond; you see exposed pad metal and a sharp, high-angle solder edge. Caused by oxidized or contaminated pads and leads, exhausted flux, or insufficient peak temperature. Fix with fresh activated flux, clean surfaces, and adequate time above liquidus (40–80 s).

4. Dewetting — Solder initially wets, then pulls back into beads, leaving a thin film with irregular high spots. Driven by surface contamination, sub-surface oxidation, or excessive time at temperature. It usually points to a pad-finish or cleanliness problem upstream; switch to a fresh OSP or ENIG lot and tighten incoming inspection.

5. Open joint / lifted lead — A lead that simply isn’t connected — a visible gap between lead and pad. Caused by lead coplanarity out of spec (common on fine-pitch QFPs), warped components or boards, or placement error. Fix by checking coplanarity, flattening warpage with a tuned profile, and verifying placement; on gull-wing leads a heel fillet must be present.

Excess-Solder and Short-Circuit Defects

6. Excess solder — A bulbous, convex joint that buries the lead contour. Often harmless cosmetically, but it hides cracks and signals process drift. Caused by over-printed paste (aperture too large or stencil too thick) or hand-rework overload. Reduce aperture or thickness and trust the SPI data.

7. Solder bridging — A solid solder connection spanning two adjacent pads or leads — a dead short, and the single most common SMT defect. Driven by too much paste, slumped paste, misalignment, or paste flow during reflow. Fix with a reduced aperture, finer paste powder (Type 4 or 5 for fine pitch), tighter print registration, and a controlled ramp. AOI catches most bridges instantly.

8. Solder balls / beading — Small spheres of solder scattered around joints or under passives. They can roam and short traces — a ball within 0.13 mm of a conductor violates minimum electrical clearance. Caused by paste spatter from moisture, a too-fast ramp, paste deposited outside the aperture, or oxidized powder. Slow the ramp through soak, store paste properly, and clean the stencil underside.

9. Solder webbing / splatter — Thin strands or splashes of solder across the laminate, usually from flux outgassing violently. Caused by moisture in the paste or board paired with an aggressive thermal ramp. Bake moisture-sensitive boards, slow the preheat, and verify flux compatibility.

10. Solder spikes / icicling — Sharp projections of solder, most common on wave-soldered through-hole joints. Caused by low solder temperature, fast conveyor speed, or poor fluxing. Tune wave temperature and contact time and ensure adequate flux coverage.

Component-Movement and Placement Defects

11. Tombstoning (Manhattan effect) — A two-terminal chip (0402, 0201, 01005) stands up on one end like a headstone, leaving the other end open. It is caused by unbalanced wetting forces: one pad reaches liquidus and pulls before the other, and surface tension levers the part upright. Drivers include asymmetric pad design, one pad tied to a large thermal plane, uneven paste volume, or placement offset. Prevent it with symmetric pads, thermal relief so both pads heat together, a slow tented preheat (around 150 °C) to synchronize melting, and balanced paste deposits — a tented linear ramp can cut tombstoning by roughly two-thirds. Counterintuitively, nitrogen reflow (great for reducing oxidation) raises wetting force and can make tombstoning worse.

12. Component shift / misalignment — A part soldered off its pads, rotated or translated. Caused by pick-and-place inaccuracy, paste tack issues, or movement during reflow. IPC-A-610 allows side overhang up to 25–50% of termination width depending on class, so slight misalignment isn’t automatically a reject. Improve placement accuracy and verify with AOI.

13. Billboarding — A chip component standing on its long side edge (like a billboard) rather than lying flat. Caused by placement error or paste disturbance. Catch it at AOI and correct nozzle and vision settings.

14. Skewing / rotation — A component rotated about its center with terminations partly off-pad. Same root causes as shift; tighten placement and check incoming part dimensions against the footprint.

15. Disturbed joint — A joint that was bumped while the solder was solidifying; the surface looks frosted, fractured, or rippled. Distinct from a cold joint — heat was adequate, but motion disrupted crystallization. Caused by conveyor vibration, handling hot boards, or board flex. Immobilize boards through cooling and reflow to repair.

Hidden and Reliability Defects

16. Solder voids — Gas pockets trapped inside the joint, visible only by X-ray. Flux volatiles can’t fully escape before the solder freezes — paste is roughly 50% flux by volume. Here is the part that surprises people: IPC-A-610 accepts BGA voids up to 25% of the ball area, and IPC-7095 data shows small voids don’t hurt reliability and can even relieve stress. Voids only matter when they cluster at the pad interface, exceed limits on thermal pads, or starve a power path. Reduce them with a soak that fully activates flux, vacuum or vapor-phase reflow for power parts, and via-in-pad fill where appropriate.

17. Head-in-pillow (HIP) — A BGA ball rests on the paste deposit but never coalesces — like a head on a pillow. It often passes ICT, then fails intermittently in the field. Caused by package or board warpage at reflow (worst at BGA corners), oxidized balls or paste, or insufficient peak. Fix with a warpage-aware profile, baked components, and nitrogen to limit oxidation; confirm with X-ray.

18. Pinholes / blowholes — A small (pinhole) or larger (blowhole) crater where gas escaped through the solidifying joint, common on plated through-holes. Caused by moisture or outgassing from the barrel or via. Bake boards and reduce trapped volatiles.

19. Cracked joint (thermal fatigue) — A fracture through the solder, usually after thermal cycling rather than at assembly — the classic field-return defect. Driven by CTE mismatch between component and board, void concentration, or an over-stiff joint. Mitigate with compliant joint geometry, controlled void levels, and corner staking on large packages.

20. IMC embrittlement / Kirkendall voiding — Excessive intermetallic growth (Cu6Sn5 converting to brittle Cu3Sn) plus micro-voids at the copper interface, caused by too-hot or too-long reflow or repeated rework. The joint looks fine but is brittle. Keep IMC in the 1–3 µm range by holding peak temperature and time above liquidus to spec, and limit rework cycles (high-reliability builds often cap rework at one cycle).

Surface, Substrate and Process Defects

21. Lifted pad / pad delamination — The copper pad peels off the laminate, taking the joint with it. Caused by overheating during rework, repeated reflow, or thermal shock — FR-4 with a Tg of 130–140 °C has limited margin under a 245 °C lead-free peak. Often unrepairable; prevent with controlled rework heat and adequate laminate Tg.

22. Graping — A joint surface that looks like a cluster of grapes — partially reflowed powder that never coalesced, specific to fine-pitch lead-free paste. Caused by oxidation in the pasty range and too-slow heating through soak; counterintuitively, the fix is often a faster ramp through the pasty zone (above 2 °C/s) plus nitrogen.

23. Solder wicking — Solder climbs the lead away from the joint (up a via or post), starving the fillet. Common on through-hole leads acting as a heat path. Caused by the lead heating faster than the pad; balance the heating and add thermal relief.

24. Flux residue / contamination — Sticky or crusty residue around joints. With no-clean flux it is usually benign, but excess or the wrong flux can drive corrosion, dendritic growth, and electrical leakage. Match flux to the process, control volume, and clean where reliability demands it using RoHS- and REACH-compliant chemistries.

25. Insufficient through-hole fill — A plated hole that isn’t filled to the required percentage of barrel height — IPC calls for roughly 75% vertical fill for Class 2 and Class 3 on many joints. Caused by inadequate heat to the barrel, large thermal mass, or a poor hole-to-lead ratio. Fix with pin-in-paste profiling, preheat, and correct annular ring and hole sizing.

Solder Joint Defects Quick-Reference Table (Symptom → Cause → Fix)

When you’re standing at the bench or the AOI station, this is the table to scan. It maps the highest-frequency solder joint defects to their visual signature, the root cause that drives them, and the first thing to try.

Defect	Visual signature	Primary root cause	First-line fix
Cold joint	Dull, grainy, poor fillet	Below liquidus / heat sunk away	Reflow with flux + heat; add thermal relief
Insufficient solder	Thin, starved fillet	Clogged or undersized aperture	Fix stencil; verify SPI volume
Solder bridging	Solder spanning two pads	Excess or slumped paste; misregistration	Reduce aperture; finer powder; AOI
Tombstoning	Chip standing on one end	Unbalanced wetting force	Symmetric pads + thermal relief; tent profile
Solder balls	Stray spheres near joints	Paste spatter; fast ramp; moisture	Slow soak; store paste cold; clean stencil
Non-wetting	Bead with exposed pad	Oxidation / spent flux	Fresh flux; clean surfaces; raise TAL
Solder voids	Internal pockets (X-ray)	Trapped flux volatiles	Longer soak; vacuum/VPS for power parts
Head-in-pillow	Ball on paste, no merge	Warpage / oxidation at reflow	Warpage profile; bake; N₂; X-ray verify
Component shift	Part off-pad or rotated	Placement error; reflow drift	Tune P&P; AOI; check footprint
Lifted pad	Pad peeled from laminate	Overheat / repeat reflow	Limit rework heat; higher-Tg laminate
Cracked joint	Fracture after cycling	CTE mismatch / void concentration	Compliant geometry; stake corners

What Causes Most Solder Joint Defects? Root-Cause Analysis

Trace a defect backward and it almost always lands in one of four places. The first is solder paste printing, responsible for the largest share of SMT defects. Aperture size and stencil thickness set the deposited volume; the area ratio (aperture opening area divided by aperture wall area, target at or above 0.66) decides whether paste releases cleanly. Get these wrong and you have insufficient solder, bridging, or solder balls before a single part is placed. Solder paste inspection (SPI) is your cheapest insurance — reject prints with volume variation beyond about 5%.

The second stage is pick-and-place. Placement offset, rotation, and Z-height feed tombstoning, billboarding, shift, and skew. High-accuracy placement (±15 µm or better) and correct footprints from the library matter most for 0201 and 01005 passives, where a few microns of offset is enough to lever a part upright during reflow.

The third — and richest — source of defects is the reflow profile. Four parameters do the damage: ramp rate, soak, peak, and time above liquidus. The table below shows working windows for the two common alloys.

Profile parameter	Sn63Pb37 (leaded)	SAC305 (lead-free)
Melting point	183 °C (eutectic)	217–220 °C
Ramp rate	1.5–3 °C/s	1.5–3 °C/s
Soak zone	150–180 °C, 60–120 s	170–190 °C, 60–120 s
Peak temperature	205–220 °C	235–250 °C
Time above liquidus	40–80 s	50–70 s
Cooling rate	3–6 °C/s	3–6 °C/s

Two non-obvious rules live here. A faster ramp does not reduce voids — push too hard through soak and you trap flux volatiles, which triggers voids, spatter, and graping. And the lead-free process window is brutally narrow: SAC305 wants a 235–250 °C peak, but FR-4 at a Tg of 130–140 °C and plastic component bodies start to fail not far above that, leaving you well under a 15 °C margin. Keep board-to-board ΔT under 5 °C with forced convection, and profile with thermocouples on the largest thermal mass and the smallest passive, not just one point.

The fourth stage is materials and handling. Oxidized pads or leads, expired paste, and moisture are quiet defect factories. Moisture-sensitive devices (MSD) that skipped the bake delaminate or pop (popcorning) and warp into head-in-pillow. Oxidized OSP or a tired ENIG lot causes non-wetting and dewetting. None of it shows up until reflow, which is exactly why incoming inspection and dry-cabinet discipline pay for themselves.

Here is the trade-off nobody likes: lead-free (RoHS) solder is mechanically tougher and environmentally mandated, but its higher melting point shrinks your process window, stresses the laminate, and — because lead-free joints are grainier — makes cold joints and HIP harder to catch by eye. You buy compliance and durability with a narrower, less forgiving process. The answer isn’t to fight it; it is to profile tighter and lean harder on X-ray.

How to Inspect for Solder Joint Defects: AOI, X-ray and ICT

No single method catches every defect, so good lines stack them. The escalation runs from cheap-and-fast to thorough-and-slow: visual inspection, automated optical inspection, X-ray, then electrical test.

Visual inspection under a microscope or a Mantis viewer catches obvious surface defects — dull cold joints, bridges, tombstones — but it is slow and operator fatigue is real. AOI automates that judgment, comparing each joint’s shape, color, and reflectivity against a known-good reference to flag bridges, missing or shifted parts, billboarding, and poor fillets at production speed. What AOI cannot do is see through a component.

For anything hidden — BGA balls, QFN thermal pads, head-in-pillow, internal voids — you need X-ray. It is the only way to measure void percentage against IPC limits or confirm that BGA balls actually coalesced. Remember that 2D X-ray projects the whole joint onto a plane, so a 25% void in projection represents a smaller volumetric fraction; for critical work, 3D CT gives true volumetric void measurement.

In-circuit test (ICT) and flying-probe verify the electrical result — continuity, shorts, component values — and will catch a hard open or short, though a marginal head-in-pillow or a cracked joint can slip past ICT and only surface under thermal cycling. Tying it all together is IPC-A-610, the acceptability standard that defines, by class, what is acceptable versus a defect: BGA voids up to 25% of ball area, side-overhang limits, minimum fillet requirements, and more. Class 2 (general electronics) and Class 3 (high-reliability — medical, aerospace) apply different limits, so agree on the class before the first board is built. For collapsing tin-lead balls after BGA rework, IPC-A-610 allows up to 30% voiding — a detail that catches OEMs off guard.

Solder Joint Defect Prevention: A DFM and Process Checklist

A wearables startup we worked with learned this the hard way. They shipped roughly 5,000 boards packed with 0402 passives that passed AOI and functional test, then watched intermittent failures trickle back from the field weeks later. The culprit was tombstoning on parts where one pad necked into a large ground pour — the pad heated unevenly and levered the chip just enough to crack the joint, not enough to flag at inspection. The fix was unglamorous: redesign the footprints with symmetric thermal relief and switch to a tented reflow profile. Defect rate on the next run dropped below 0.1%. Most defects are designed-in or profiled-in, which means they’re preventable before the line ever runs. Run this checklist on your next build.

1. Design symmetric pads with thermal relief. Match pad sizes on two-terminal passives and add thermal-relief spokes wherever a pad ties to a plane or large copper pour. This is the single biggest lever against tombstoning and cold joints.
2. Right-size stencil apertures. Target an area ratio at or above 0.66 and pick a stencil thickness (typically 0.1–0.12 mm for mixed fine-pitch) that sets the correct paste volume. Use a laser-cut, electropolished stencil for clean release.
3. Profile the oven — and re-profile it. Attach thermocouples to the largest and smallest thermal masses, hit the alloy’s windows from the table above, and hold board-to-board ΔT under 5 °C. Re-verify after any paste, board, or component change.
4. Gate the line with SPI and AOI. SPI after print (reject volume variation above ~5%, height above ~10%), AOI after placement and again after reflow. Catching a print defect costs cents; catching it as a field return costs a recall.
5. Bake moisture-sensitive parts and store paste cold. Follow the J-STD-033 bake schedules for MSD components, keep paste at 1–6 °C and let it acclimate before use, and run a dry-cabinet discipline. This kills HIP, popcorning, voids, and dewetting at the source.
6. X-ray your hidden joints. If the build has BGAs, QFNs, or power packages, sample-X-ray against IPC-A-610 and IPC-7095 void limits rather than hoping.
7. Specify the IPC class up front. Decide Class 2 versus Class 3 before design freeze so pad geometry, acceptance limits, and rework rules are set — not argued about after the first reject.

Frequently Asked Questions About Solder Joint Defects

What causes a cold solder joint?

A cold solder joint forms when the connection never reaches the solder alloy’s liquidus temperature, so no intermetallic bond develops. The usual causes are insufficient iron or oven heat, an oxidized tip, a large copper plane pulling heat away, or lead-free paste in an under-cooked reflow profile. The result is a dull, weak, high-resistance joint.

What does a cold solder joint look like?

A cold joint looks dull, grainy, or rough instead of smooth and shiny, often with a lumpy or convex shape that sits on the pad rather than feathering into a concave fillet. You may see micro-cracks or a faint ring around the lead. Lead-free joints are naturally duller, which makes cold joints harder to spot.

How do you fix a cold solder joint?

Reheat the joint with fresh flux until the solder fully melts and flows, then let it cool undisturbed. If the solder is contaminated or excessive, remove it with desoldering braid first and reapply. Skip the rework when the pad has lifted, the part is heat-sensitive, or access is impossible on a dense HDI board.

What causes tombstoning in SMT?

Tombstoning is caused by unbalanced wetting forces during reflow: one pad reaches melting temperature and pulls before the other, and surface tension levers the chip upright. Asymmetric pad design, a pad tied to a large thermal plane, uneven paste volume, and placement offset all contribute, especially on tiny 0402 and 01005 passives.

How do you prevent tombstoning?

Design symmetric pads with thermal relief so both pads heat together, balance the paste deposits, and use a slow tented preheat (around 150 °C) to synchronize melting across the part. Keep placement accurate and footprints correct. A tented linear ramp can reduce tombstoning by roughly two-thirds.

What is the most common SMT solder defect?

Solder bridging — stray solder shorting two adjacent pads — is generally cited as the most common SMT defect, driven by excess or slumped paste and fine-pitch geometry. Cold joints and tombstoning rank close behind. All three are routinely caught by AOI when the line is set up correctly.

Are solder voids always a defect?

No. IPC-A-610 accepts BGA solder voids up to 25% of the ball area, and IPC-7095 data shows small voids rarely hurt reliability and can even relieve stress. Voids become a problem only when they cluster at the pad interface, exceed limits on thermal pads, or block a power path.

Can solder joint defects be repaired?

Many can. Cold joints, bridges, insufficient solder, and shifted parts are routinely reworked by reflowing, adding or removing solder, and reseating components. Some defects are terminal: a lifted pad, severe oxidation, or a heat-damaged component usually means scrap. High-reliability builds often cap rework at a single cycle to limit IMC embrittlement.

Catch Solder Joint Defects Before They Ship

The pattern across all 25 defects is the same: the cheap fix is upstream — in pad design, the stencil, the profile, and incoming material — and the expensive one is a field return. Build the inspection ladder, profile the oven, respect the IPC class, and the vast majority of solder joint defects never reach a customer. If you’d like a second set of eyes before you commit, send your Gerber and BOM for a free DFM review and we’ll flag the footprints and process risks most likely to cause defects on your board.