Inquire: Call 0086-755-23203480, or reach out via the form below/your sales contact to discuss our design, manufacturing, and assembly capabilities.
Quote: Email your PCB files to Sales@pcbsync.com (Preferred for large files) or submit online. We will contact you promptly. Please ensure your email is correct.
Notes: For PCB fabrication, we require PCB design file in Gerber RS-274X format (most preferred), *.PCB/DDB (Protel, inform your program version) format or *.BRD (Eagle) format. For PCB assembly, we require PCB design file in above mentioned format, drilling file and BOM. Click to download BOM template To avoid file missing, please include all files into one folder and compress it into .zip or .rar format.
VCU118 Development Kit: Virtex UltraScale+ Board Review
The VCU118 has established itself as AMD/Xilinx’s flagship development platform for Virtex UltraScale+ FPGA evaluation. Having spent considerable time bringing up designs on this board for 100G networking and PCIe acceleration projects, I can say it delivers everything a serious FPGA developer needs—and a few things you didn’t know you wanted. This comprehensive review covers the Xilinx VCU118 from a practical engineering perspective: specifications, features, setup considerations, and whether the EK-U1-VCU118-G kit justifies its price tag.
The VCU118 is AMD’s official development platform featuring the XCVU9P-L2FLGA2104E FPGA from the Virtex UltraScale+ family. Unlike budget-oriented development boards, the VCU118 targets professional applications including 1+ Tb/s networking, data center acceleration, and radar/early-warning systems. The board part number EK-U1-VCU118-G includes the evaluation board, loopback cards, cables, power adapters, and a device-locked Vivado Design Suite license.
The XCVU9P at the heart of the Xilinx VCU118 provides 2.5 million logic cells, 6,840 DSP slices, and 345.9 Mb of on-chip memory. With 52 GTY transceivers available on this board configuration—each capable of 32.75 Gb/s—the VCU118 enables serious high-speed serial development without requiring custom hardware.
VCU118 Complete Specifications
FPGA Device Specifications
Feature
XCVU9P-L2FLGA2104E Specification
System Logic Cells
2,586,150
CLB Flip-Flops
2,364,480
CLB LUTs
1,182,240
Block RAM
75.9 Mb
UltraRAM
270.0 Mb
DSP48E2 Slices
6,840
GTY Transceivers (on board)
52
HP I/O (available)
832
Speed Grade
-2 (Low Power)
Package
FLGA2104
VCU118 Board Memory Subsystem
Memory Type
Configuration
Capacity
Interface
DDR4 Component
2× interfaces, 80-bit each
2× 4 GB
2400 MT/s
RLDRAM3
2× 36-bit devices
288 MB
72-bit
Quad SPI Flash
Dual
2× 1 Gb
x8 mode
Micro-SD Card
1× slot
User dependent
SPI
The dual DDR4 interfaces use Micron MT40A256M16GE-083E components—five devices per channel providing 80-bit data width (64-bit data plus 16-bit ECC). For applications requiring lower latency, the 288 MB RLDRAM3 delivers significantly faster random access than DDR4.
High-Speed Connectivity
Interface
Specification
Transceiver Count
PCIe Gen3 x16
8 GT/s per lane
16 GTY
QSFP28
2× cages, 28 Gb/s per lane
8 GTY
FMC+ HSPC (J22)
24 GTY transceivers
24 GTY
Samtec FireFly
4× 28 Gb/s optical
4 GTY
FMC HPC1 (J2)
58 differential pairs
—
The 52 GTY transceivers are distributed across PCIe, QSFP28, FMC+, and FireFly interfaces. For Rev. 2.0 and later boards running at VCCINT = 0.85V, PCIe Gen3 x16 is fully supported. Earlier revisions at VCCINT = 0.72V are limited to Gen3 x8.
Xilinx VCU118 Clock Architecture
The VCU118 includes a sophisticated clocking subsystem that eliminates the need for external clock sources in most applications:
Clock Source
Device
Frequency
Purpose
Si5335A
Quad generator
Multiple
System clocks
Si570 #1
I2C programmable
156.25 MHz default
User clock
Si570 #2
I2C programmable
156.25 MHz default
QSFP reference
Si570 #3
I2C programmable
Variable
MGT reference
SG5032
Fixed oscillator
250 MHz
Fixed reference
Si5328C
Jitter attenuator
Variable
Recovered clock cleanup
SMA inputs
2× differential
User supplied
External reference
The Si5328C jitter attenuator is particularly valuable for telecom applications requiring cleaned-up recovered clocks. Two SMA connectors allow injection of external reference clocks for MGT applications.
EK-U1-VCU118-G Kit Contents
The complete EK-U1-VCU118-G kit includes:
Item
Quantity
Description
VCU118 Evaluation Board
1
Main board with XCVU9P
Samtec FMC+ Loopback Card
1
FMC+ HSPC testing
FMC Loopback Card
1
FMC HPC1 testing
PCIe Loopback Card
1
PCIe x16 testing
FireFly Loopback Cable
1
Optical loopback testing
QSFP+ Loopback Adapter
1
QSFP28 testing
Power Cord
1
Regional variant
12V Power Adapter
1
150W adapter
ATX PCIe Power Adapter
1
For chassis installation
USB Micro Cable
1
JTAG/UART connection
Ethernet Cable
1
Cat5e
Vivado License Voucher
1
Device-locked, 1 year updates
The included Vivado Design Suite: Design Edition license is node-locked and device-locked to the XCVU9P. This license must be redeemed within one year of purchase.
The VCU118 functions as a PCIe endpoint card but exceeds standard card dimensions—the board height is greater than the 4.376-inch (11.15 cm) PCIe specification. Ensure your chassis has adequate clearance before installation.
Power options for chassis installation:
Power Source
Connector
Notes
ATX 4-pin Peripheral
J16
Standard PC power supply
12V Adapter
J15
Standalone operation
PCIe Slot Power
Edge connector
Limited current
When installed in a chassis, the ATX power adapter provides 12V through the 4-pin peripheral connector. The board’s power management system handles sequencing and voltage regulation internally.
PCIe Configuration
Generation
Link Width
Bandwidth
VCU118 Support
Gen1
x16
4 GB/s
Yes
Gen2
x16
8 GB/s
Yes
Gen3
x8
8 GB/s
Rev 1.x (VCCINT = 0.72V)
Gen3
x16
16 GB/s
Rev 2.0+ (VCCINT = 0.85V)
The integrated PCIe hard block provides DMA support and can operate as either endpoint or root complex, though endpoint mode is the typical configuration.
VCU118 Built-In Self-Test (BIST)
The VCU118 ships with a pre-loaded BIST that validates board functionality on power-up. The test sequence runs automatically and indicates pass/fail status through GPIO LEDs:
Test
LED
Automatic
Description
Clock
DS4
Yes
Clock generator validation
DDR4
DS5
Yes
Memory interface test
BRAM
DS6
Yes
Block RAM test
Flash
DS7
Yes
Quad SPI flash test
I2C
DS8
Yes
I2C bus communication
DIP Switch
DS9
Manual
User interaction required
Pushbuttons
DS10
Manual
User interaction required
When power is applied and SW1 is in the ON position, LED DS3 glows green indicating good power. LED DS34 glows blue when the FPGA completes configuration.
Xilinx VCU118 vs. Other Development Boards
Feature
VCU118
VCU128
VCU108
FPGA
XCVU9P
XCVU37P
XCVU095
Logic Cells
2.5M
2.9M
930K
HBM
No
8 GB
No
DDR4
8 GB
4.5 GB
8 GB
GTY Transceivers
52
32
64
PCIe
Gen3 x16
Gen3 x16
Gen3 x8
FMC+
1× HSPC
1× HSPC
No
FMC HPC
1×
No
2×
List Price
~$8,400
~$10,800
~$6,000
Status
Active
Discontinued
Active
The VCU118 occupies the sweet spot for most high-performance applications. The VCU128 added HBM memory but has been discontinued. For projects requiring maximum transceiver count, the VCU118’s 52 GTY channels typically suffice, though larger designs may require the VU13P-based platforms.
The VCU118 implements sophisticated power management using Maxim MAX20751E and MAX15301 controllers with PMBus monitoring. Real-time voltage and current measurements are available through the I2C bus using TI INA226 power monitors.
Power Rail
Nominal Voltage
Monitor
VCCINT
0.85V
INA226
VCCBRAM
0.85V
INA226
VCCAUX
1.8V
INA226
VCC1V2
1.2V
INA226
MGTAVCC
0.9V
INA226
MGTAVTT
1.2V
INA226
The onboard Zynq-7000 XC7Z010 system controller manages power sequencing, clock configuration, and provides a graphical interface (SCUI) for system monitoring.
Getting Started with the VCU118
Initial Setup Procedure
Install Vivado Design Suite and redeem the license voucher at xilinx.com/getlicense
Connect the USB cable to J4 for JTAG and UART access
Apply 12V power through J15 or connect to ATX power in a chassis
Set SW1 to ON position to enable power
Verify DS3 (green) and DS34 (blue) illuminate indicating successful power-up and configuration
Run SCUI software to verify system controller communication
Common Configuration Modes
SW16 Position
Mode
M[2:0] = 001
Master Quad SPI
M[2:0] = 010
Master BPI (Rev 1.x boards)
M[2:0] = 101
JTAG
For development, JTAG mode (M[2:0] = 101) is typical. Production designs typically use Quad SPI boot.
Essential Documentation and Resources
Technical Documents
Document
Number
Description
VCU118 Board User Guide
UG1224
Complete board reference
VCU118 Quick Start Guide
XTP453
Initial setup instructions
VCU118 Schematic
—
Board-level design files
Virtex UltraScale+ Data Sheet
DS923
FPGA specifications
GTY Transceivers User Guide
UG578
Transceiver configuration
PCB Design User Guide
UG583
Layout guidelines
Download Resources
Resource
URL
VCU118 Product Page
amd.com/vcu118
Board Files (XDC)
amd.com/support
Reference Designs
amd.com/support
Vivado Design Suite
amd.com/vivado
SCUI System Controller
amd.com/vcu118
Frequently Asked Questions
What is the difference between VCU118 Rev 1.x and Rev 2.0?
The primary difference is VCCINT voltage: Rev 1.x boards operate at 0.72V (limiting PCIe to Gen3 x8), while Rev 2.0 and later operate at 0.85V (enabling full PCIe Gen3 x16). Rev 2.0 also transitioned from BPI flash to Quad SPI flash. Check the board silkscreen or use the system controller to identify your revision.
How much does the EK-U1-VCU118-G kit cost?
The EK-U1-VCU118-G lists at approximately $8,000-$9,000 from authorized distributors like DigiKey, Mouser, and Avnet. Pricing varies by region and availability. The kit includes the board, loopback cards, cables, power supplies, and a device-locked Vivado license. The XCVU9P FPGA alone lists at approximately $58,000, making the evaluation kit a significant value for development purposes.
Can I use the VCU118 for production applications?
The VCU118 is designed as an evaluation and development platform. While technically capable of production deployment, most organizations transition to custom PCBs for volume production. The board’s reference design (schematics, layout files) can serve as a starting point for custom designs. Note that devices on evaluation boards are typically marked for engineering use and may not carry full production qualifications.
What Vivado license is included with the VCU118?
The kit includes a Vivado Design Suite: Design Edition license that is node-locked (tied to your computer) and device-locked (only works with XCVU9P). The license includes one year of updates from activation. You must redeem the voucher code at xilinx.com/getlicense within one year of purchase.
How do I connect the VCU118 to external equipment?
The VCU118 provides multiple connectivity options: dual QSFP28 cages for 100G optical modules, FMC+ HSPC connector for mezzanine cards with up to 24 GTY transceivers, FMC HPC connector for standard FMC modules, PCIe x16 edge connector for host connection, Gigabit Ethernet via RJ-45, and dual USB-to-UART bridges for serial communication. The Samtec FireFly connector enables direct optical connectivity for chip-to-optics applications.
Conclusion
The VCU118 remains AMD’s most versatile Virtex UltraScale+ development platform. With the XCVU9P providing 2.5 million logic cells, 52 GTY transceivers, and comprehensive on-board memory, it handles everything from 100G networking to AI inference development. The inclusion of FMC+ support, dual QSFP28 cages, and certified PCIe Gen3 x16 makes it suitable for nearly any high-performance FPGA application.
The EK-U1-VCU118-G kit price of approximately $8,000-$9,000 is substantial, but represents good value considering the included Vivado license and the cost of the bare FPGA. For teams developing production systems based on the XCVU9P or similar Virtex UltraScale+ devices, the Xilinx VCU118 provides a proven, well-documented platform that accelerates development and reduces risk.
Whether you’re prototyping networking equipment, developing acceleration cards, or validating high-speed serial designs, the VCU118 delivers the features and flexibility that professional FPGA development demands.
Inquire: Call 0086-755-23203480, or reach out via the form below/your sales contact to discuss our design, manufacturing, and assembly capabilities.
Quote: Email your PCB files to Sales@pcbsync.com (Preferred for large files) or submit online. We will contact you promptly. Please ensure your email is correct.
Notes: For PCB fabrication, we require PCB design file in Gerber RS-274X format (most preferred), *.PCB/DDB (Protel, inform your program version) format or *.BRD (Eagle) format. For PCB assembly, we require PCB design file in above mentioned format, drilling file and BOM. Click to download BOM template To avoid file missing, please include all files into one folder and compress it into .zip or .rar format.