Xilinx CPLD Programmer and Xilinx CPLD Board: The Complete Guide for Engineers

When you’re working on embedded systems, industrial controllers, or replacing discrete logic with something more flexible, a Xilinx CPLD programmer and Xilinx CPLD board setup becomes an indispensable tool in your hardware development workflow. I’ve spent over a decade designing PCBs that integrate CPLDs for everything from power sequencing to glue logic, and this guide captures the practical knowledge you need to get started or level up your CPLD work.

Complex Programmable Logic Devices (CPLDs) from Xilinx (now AMD) offer something unique: non-volatile configuration, instant-on operation, and deterministic timing that FPGAs simply cannot match. Whether you’re prototyping a state machine, building custom interface logic, or consolidating a handful of 74-series chips into a single package, understanding the right programmer and development board combination will save you hours of frustration.

What is a Xilinx CPLD Programmer?

A Xilinx CPLD programmer is a hardware tool that transfers your compiled design configuration into the CPLD chip. Unlike microcontrollers that run sequential code, CPLDs implement parallel logic circuits described in Hardware Description Languages (HDL) like VHDL or Verilog. The programmer uses the JTAG (Joint Test Action Group) interface to load this configuration into the CPLD’s non-volatile Flash memory.

The programming process involves connecting your PC to the programmer via USB, which then interfaces with the target CPLD board through a JTAG header. The Xilinx ISE WebPACK software generates a .jed file containing the configuration data, and tools like iMPACT handle the actual programming sequence.

Types of Xilinx CPLD Programmers Available

Choosing the right programmer depends on your budget, required features, and which Xilinx device families you need to support. Here’s a breakdown of the main options I’ve used in production environments:

Official Xilinx Platform Cable USB II (HW-USB-II-G)

The Platform Cable USB II is Xilinx’s flagship programmer, and it’s worth the investment if you’re doing professional CPLD development. It supports all Xilinx device families including CPLDs (XC9500, XC9500XL, XC9500XV, CoolRunner XPLA3, CoolRunner-II), FPGAs, and PROMs. With USB 2.0 Hi-Speed support and JTAG clock speeds up to 24MHz, it programs devices significantly faster than budget alternatives.

Key features include automatic I/O voltage sensing (1.5V to 5V), integrated firmware for reliable operation, and full compatibility with Vivado, ISE, and ChipScope Pro for debugging. The included flying wire adapter and ribbon cable handle most connection scenarios you’ll encounter.

Third-Party Compatible Xilinx CPLD Programmers

Several manufacturers produce Platform Cable USB clones at a fraction of the cost. The Waveshare Platform Cable USB uses the CY7C68013A microcontroller combined with a CoolRunner-II CPLD internally to replicate the official cable’s functionality. These typically cost $20-50 versus $250+ for the genuine Xilinx cable.

For basic CPLD programming tasks, these clones work reliably. However, I’ve encountered occasional timing issues with ChipScope debugging on certain FPGA families. For CPLD-only work, they’re perfectly adequate. The Digilent JTAG-HS2 and JTAG-HS3 are excellent middle-ground options with solid build quality and Xilinx tool compatibility.

DIY and Alternative Xilinx CPLD Programmer Solutions

If you’re on a tight budget or enjoy building your own tools, several open-source options exist. The FT232RL-based programmer uses the ubiquitous FTDI chip to bit-bang the JTAG protocol. Combined with xc3sprog software, this approach can program XC9500XL devices for under $10 in parts. I’ve used this setup successfully with a Raspberry Pi for field programming.

The Amontec JTAGkey and Bus Pirate can also program Xilinx CPLDs by generating SVF files in iMPACT and using external SVF player software. These aren’t as convenient as native Xilinx tools but work in a pinch.

Xilinx CPLD Programmer Comparison Table

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Understanding Xilinx CPLD Board Options

A Xilinx CPLD board provides the target hardware where your logic design runs. Development boards include supporting circuitry like voltage regulators, oscillators, LEDs, and switches to help you prototype and test designs before committing to a custom PCB. The board you choose depends on the CPLD family, required I/O count, and available features.

Xilinx CPLD Device Families Explained

XC9500/XC9500XL Series CPLDs

The XC9500 series has been the workhorse of Xilinx’s CPLD lineup for over two decades. The XC9500XL variants operate at 3.3V with 5V-tolerant inputs, making them ideal for interfacing between different voltage domains. These devices offer 36 to 288 macrocells with 10,000 program/erase cycles.

The XC9572XL (72 macrocells) is particularly popular for beginner projects and glue logic applications. Its TQFP-100 package is hand-solderable with some practice, and numerous development boards target this specific device. Propagation delays as low as 5ns make these suitable for timing-critical applications.

CoolRunner-II CPLD Family

The CoolRunner-II family combines high performance with ultra-low power consumption. With a 1.8V core supply and I/O banks supporting 1.5V to 3.3V, these devices excel in battery-powered applications. The XC2C32A through XC2C512 range from 32 to 512 macrocells.

Unique features include DataGATE (input signal blocking for power savings) and DualEDGE triggering that effectively doubles clock frequency without increasing power. However, the 1,000 program/erase cycle limit is lower than XC9500XL, so plan your development iterations accordingly.

Xilinx CPLD Family Comparison

Popular Xilinx CPLD Development Boards

XC9572XL CPLD Development Boards

The XC9572XL is the most commonly used device for CPLD learning and prototyping. Several manufacturers offer ready-to-use development boards:

• Dangerous Prototypes CPLD Board: Breadboard-friendly design with broken-out I/O pins, Bus Pirate compatible for programming
• Seeed Studio XC9572XL Board: Includes 50MHz oscillator, 3.3V regulator, JTAG header, and programmable LEDs
• Paradisetronic XC9572XL Board: Similar features with all GPIO broken out to headers, affordable entry point
• DIY Home-Built Boards: KiCad and Eagle files available for single-sided PCB fabrication

CoolRunner-II CPLD Starter Kits

Xilinx’s official CoolRunner-II Starter Kit (now discontinued but available on secondary markets) provided an excellent learning platform. The kit included the SK-CR2-CPLD-G board featuring an XC2C256 device, USB programming cable, and ISE software license. Third-party alternatives include the pldkit.com XMC2-128 module.

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Setting Up Your Xilinx CPLD Development Environment

Required Software for Xilinx CPLD Programming

Xilinx ISE WebPACK Design Suite

The ISE WebPACK (version 14.7 is the final release) is the free software suite required for CPLD development. While Xilinx has moved to Vivado for newer FPGAs, ISE remains the only option for XC9500 and CoolRunner-II devices. The software includes:

• Project Navigator: Main IDE for creating projects and managing source files
• XST Synthesis: Converts VHDL/Verilog to device-specific netlists
• CPLD Fitter: Maps logic to CPLD macrocells and I/O pins
• iMPACT: Programming utility for loading designs via JTAG
• ISIM: Basic simulation for verifying design behavior

Download ISE WebPACK from the AMD/Xilinx website. The installer is approximately 6GB, and installation requires around 19GB of disk space. You’ll need to register for a free license.

Connecting Your Xilinx CPLD Programmer to the Board

The physical connection between programmer and CPLD board uses the JTAG interface. Standard Xilinx JTAG headers use either a 14-pin ribbon cable or 6-pin flying leads. The essential signals are:

Step-by-Step Xilinx CPLD Programming Process

Here’s the workflow I use for every CPLD project, from initial design to programmed hardware:

1.Create a New Project: Launch ISE Project Navigator and create a new project. Select your target device (e.g., XC9572XL-10VQG64) and preferred HDL language.

2.Write HDL Code: Create VHDL or Verilog source files describing your logic. Start simple—a blinking LED confirms your toolchain works.

3.Add Constraints: Create a UCF (User Constraints File) mapping HDL signals to physical CPLD pins. Use PACE or edit the UCF text directly.

4.Synthesize: Run synthesis to convert HDL to a technology-specific netlist. Check for warnings about unconnected signals or inferred latches.

5.Implement Design: The fitter maps logic to CPLD resources. Review the fitting report for resource utilization and timing.

6.Generate Programming File: Create the .jed file containing the configuration data for your CPLD.

7.Program Device: Launch iMPACT, connect to your programmer, detect the CPLD, assign the .jed file, and program. Verify the programming succeeded.

Practical Applications for Xilinx CPLD Boards

From my experience designing production hardware, CPLDs excel in specific application areas where their instant-on behavior and deterministic timing provide clear advantages:

Glue Logic Consolidation

Replacing multiple 74-series logic chips with a single CPLD reduces BOM complexity, PCB area, and potential failure points. A design requiring 7400, 7408, 7432, and 74138 ICs can often fit in an XC9536XL while adding flexibility for future revisions. The cost crossover typically occurs around 4-5 discrete logic ICs.

Microprocessor Interface Logic

Address decoding, chip select generation, wait state insertion, and bus protocol conversion are natural CPLD applications. The XC9500XL’s 5V-tolerant inputs are particularly valuable when interfacing modern 3.3V microcontrollers with legacy 5V peripherals or memory.

Power Sequencing and Supervisory Logic

CPLDs wake up immediately with their configuration intact, making them ideal for power-on sequencing before the main processor boots. I’ve used CoolRunner-II devices to control multiple voltage rails, monitor power-good signals, and implement watchdog functionality for mission-critical systems.

Protocol Conversion and Signal Conditioning

Converting between parallel and serial interfaces, level translation between voltage domains, and implementing custom protocols all benefit from CPLD flexibility. Clock domain crossing, pulse stretching, and debouncing circuits are trivial to implement in HDL.

Important Considerations: AMD’s End-of-Life Announcement

In January 2024, AMD announced End-of-Life (EOL) for the XC9500XL, CoolRunner, and CoolRunner-II CPLD families. Final orders were accepted through June 2024. If you’re starting a new design, consider the implications:

• Existing Designs: Stock up on devices if you have production products using these CPLDs
• New Designs: Consider alternatives like Lattice MachXO2/MachXO3 or Intel MAX 10 for new projects
• Learning: Xilinx CPLDs remain excellent for education, and surplus stock will be available for years
• Migration Path: Small Spartan-7 FPGAs can replace CPLDs if non-volatile operation isn’t required

Useful Resources for Xilinx CPLD Development

Software Downloads and Documentation

• Xilinx ISE WebPACK 14.7: https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/vivado-design-tools/archive-ise.html
• XC9500XL Family Datasheet: https://docs.amd.com/v/u/en-US/ds054
• CoolRunner-II Family Datasheet: https://docs.amd.com/v/u/en-US/ds090
• Platform Cable USB II User Guide: https://docs.amd.com/v/u/en-US/ug344
• CPLD Fitter User Guide: https://docs.amd.com/v/u/en-US/cpld_fitting

Where to Buy Xilinx CPLD Development Boards

• DigiKey: https://www.digikey.com – Wide selection of Xilinx CPLDs and dev boards
• Mouser Electronics: https://www.mouser.com – Official distributor for Xilinx/AMD devices
• Newark/element14: https://www.newark.com – Development kits and programmers
• Seeed Studio: https://www.seeedstudio.com – Budget-friendly XC9572XL boards
• Dangerous Prototypes: http://dangerousprototypes.com – Open-source CPLD boards

Learning Resources and Tutorials

• StartingElectronics VHDL Course: https://startingelectronics.org/software/VHDL-CPLD-course/
• CPLD Guide on GitHub: https://github.com/mikeroyal/CPLD-Guide
• Udemy VHDL for Xilinx CPLD: https://www.udemy.com/course/step-by-step-vhdl-programming-for-xilinx-fpga-cpld-project/
• EDAboard CPLD Forum: https://www.edaboard.com/forums/cpld-fpga.15/

Frequently Asked Questions About Xilinx CPLD Programmers and Boards

What’s the difference between a Xilinx CPLD and FPGA?

CPLDs store their configuration in non-volatile Flash memory, providing instant-on operation and deterministic timing. FPGAs use SRAM-based configuration that must be loaded from external memory at power-up but offer far more logic resources. For designs under a few hundred macrocells with timing-critical requirements, CPLDs are often the better choice. FPGAs excel at complex designs requiring DSP blocks, embedded memory, or soft processors.

Can I use Vivado to program Xilinx CPLDs?

No. Vivado does not support any Xilinx CPLD families. You must use ISE WebPACK 14.7 for XC9500, XC9500XL, XC9500XV, CoolRunner XPLA3, and CoolRunner-II devices. ISE runs on Windows 7/10 (with compatibility mode) and certain Linux distributions. Virtual machines work well for running ISE on modern systems.

Do I need the official Xilinx programmer or will a clone work?

For basic CPLD programming, quality clone programmers work reliably. I recommend the Waveshare Platform Cable USB or Digilent JTAG-HS2/HS3 as cost-effective alternatives. The official Platform Cable USB II is worth the investment if you need ChipScope debugging, guaranteed compatibility with all Xilinx tools, or support for the newest device families.

Which Xilinx CPLD should I start with as a beginner?

The XC9572XL is the most beginner-friendly choice. It has enough macrocells (72) for meaningful projects, widespread documentation, and numerous affordable development boards. The 5V-tolerant inputs simplify interfacing with Arduino and other common platforms. Start with LED blinking, then progress to button debouncing, counters, and simple state machines.

What alternatives exist now that Xilinx CPLDs are discontinued?

Lattice Semiconductor offers the MachXO2 and MachXO3 families with similar capabilities. Intel (formerly Altera) MAX 10 devices provide CPLD-like functionality with more resources. For simpler applications, the Lattice iCE40 series offers low-power options. Each requires different toolchains (Lattice Diamond/Radiant or Intel Quartus), so factor in the learning curve when planning migration.

Conclusion

Working with a Xilinx CPLD programmer and Xilinx CPLD board opens up possibilities that microcontrollers simply cannot match. The combination of instant-on operation, deterministic timing, and parallel processing makes CPLDs invaluable for interface logic, protocol conversion, and timing-critical applications.

Whether you choose the official Platform Cable USB II or a budget-friendly clone, and whether you build your own development board or purchase a ready-made solution, the investment in learning programmable logic pays dividends throughout your engineering career. The skills transfer directly to FPGA development when your designs outgrow CPLD resources.

Get your hands on a programmer and development board, download ISE WebPACK, and start with a simple LED blinking design. From there, you’ll quickly discover applications in your own projects where a CPLD is the perfect solution.

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