ZC702 Evaluation Kit: Complete Zynq-7000 Development Board Setup Guide

The ZC702 evaluation board has been my go-to platform for Zynq-7000 development since its release. Having worked with dozens of these boards across multiple projects, I can tell you that proper setup makes all the difference between frustrating debug sessions and productive development cycles. This guide covers everything from unboxing to running your first embedded application on the Xilinx Zynq ZC702.

What Makes the ZC702 Board Special

The ZC702 isn’t just another development board—it’s a complete embedded processing platform built around the Zynq XC7Z020-1CLG484C All Programmable SoC. What sets the ZC702 evaluation board apart is the combination of dual ARM Cortex-A9 processors running at 667 MHz with 85K logic cells of programmable fabric, all on a single chip.

I’ve used cheaper Zynq boards for simple prototypes, but when a project demands full peripheral access, proper power monitoring, and industry-standard expansion options, the ZC702 delivers. The two FMC LPC connectors alone justify the investment for any serious embedded development work.

ZC702 Board Key Specifications

Feature	Specification
SoC Device	XC7Z020-1CLG484C
ARM Cores	Dual Cortex-A9 @ 667 MHz
Programmable Logic	85K Logic Cells, 560 KB BRAM
DDR3 Memory	1 GB (4x 256Mb x 8 devices)
Flash Storage	128 Mb Quad SPI
Ethernet	10/100/1000 Mbps (Marvell 88E1116R)
USB	USB 2.0 OTG with ULPI PHY
Expansion	2x FMC LPC Connectors
Video Output	HDMI
Configuration	JTAG, SD Card, QSPI

ZC702 Evaluation Board Kit Contents

When you open the ZC702 kit, make sure you have all the components. Missing cables during initial setup is surprisingly common—I’ve wasted hours troubleshooting only to realize I was using the wrong USB cable.

Component	Quantity	Purpose
ZC702 Base Board	1	Main development platform
12V Power Supply	1	Board power
USB Type-A to Mini-B Cable	2	JTAG and UART connections
USB Type-A to Micro-B Cable	1	USB OTG
Ethernet Crossover Cable	1	Direct PC connection
HDMI Cable	1	Video output
SD Card with Reference Design	1	Pre-loaded demo and boot files
USB Hub	1	Peripheral expansion
Quick Start Guide	1	Initial setup reference

Hardware Setup for the Xilinx Zynq ZC702

Before powering anything, let’s get the physical connections sorted. I’ve seen engineers skip steps here and spend days chasing phantom issues.

Initial Cable Connections

Start with the board powered off. Connect in this order:

1.Power Supply: Connect the 12V adapter to J60. Don’t turn on SW11 yet.

2.JTAG Connection: Plug the Micro-B USB cable into J2 (labeled PROG). This provides both JTAG programming and USB-UART access through the onboard Digilent module.

3.Serial Console: The J17 Mini-B USB port connects to the CP210x USB-to-UART bridge. You’ll need Silicon Labs drivers for this.

4.Ethernet: Connect to J11 if you need network access during development.

5.SD Card: Insert the pre-loaded SD card into J64. The reference design boots Linux and provides immediate functionality verification.

Default Switch and Jumper Settings

The ZC702 ships with specific switch positions for SD card boot. Before first power-on, verify these settings match your intended boot mode.

Switch	Position	Mode
SW16-1	OFF (Right)	Boot mode bit 0
SW16-2	ON (Left)	Boot mode bit 1
SW16-3	OFF (Right)	Boot mode bit 2
SW16-4	OFF (Right)	Boot mode bit 3
SW16-5	OFF (Right)	Boot mode bit 4

This configuration sets SD card boot. For QSPI boot or JTAG mode, you’ll need different settings which I’ll cover later.

ZC702 Boot Mode Configuration

Understanding boot modes saves tremendous debugging time. The Zynq boot process reads mode pins at power-up to determine where to find the First Stage Boot Loader (FSBL).

Complete Boot Mode Reference

SW16 Setting	Mode	Use Case
00000	JTAG	Development and debugging
01000	QSPI	Production deployment
00110	SD Card	Linux development
00100	NAND	Alternative non-volatile storage

The SW10 DIP switch controls JTAG chain configuration, which is equally important:

SW10 Setting	JTAG Source
01	Digilent USB (J2)
10	Platform Cable USB (J58)
11	20-pin header (J58)

For typical development, set SW10 to 01 to use the onboard Digilent USB-JTAG module. This gives you programming and debug capability through a single USB connection.

Read more Xilinx FPGA Series:

Running the Built-In Self-Test (BIST)

The BIST verifies that your ZC702 board is functioning correctly. Run this before starting any development—it catches hardware issues early.

BIST Setup Requirements

1.Set SW16 to QSPI boot mode: SW1=OFF, SW2=ON, SW3=OFF, SW4=OFF, SW5=OFF

2.Connect USB cables to J2 (JTAG) and J17 (UART)

3.Open a terminal emulator at 115200 baud, 8N1

4.Power on with SW11

BIST Test Sequence

After power-up, the Done LED (DS3) should illuminate green within 15 seconds. The BIST exercises these subsystems:

Test	Status LED	Pass Indication
DDR3 Memory	DS4	Green when VTT OK
Ethernet PHY	DS6-DS8	Activity during test
USB Controller	DS5	Green (no error)
Configuration	DS3	Green after load
Power Rails	DS13	Green when all good

If any LED shows red or fails to illuminate, check connections before assuming hardware failure. I’ve seen DS5 (USB power error) trigger from using low-quality USB cables.

Installing Development Tools for ZC702

The ZC702 works with AMD’s Vivado Design Suite and Vitis development environment. Tool installation order matters.

Required Software Components

Tool	Version	Purpose
Vivado Design Suite	2023.2+	Hardware design, synthesis, implementation
Vitis Unified IDE	2023.2+	Software development, debugging
PetaLinux Tools	2023.2+	Linux BSP generation (Linux host required)
Cable Drivers	Included	JTAG communication

Install Vivado first—it includes the Vitis platform automatically. During installation, select the Zynq-7000 device family to minimize disk usage. The full installation requires approximately 80 GB, but selecting only Zynq-7000 reduces this to around 30 GB.

Driver Installation

Windows users need the Silicon Labs CP210x drivers for UART and the Digilent drivers for JTAG. Both are included with Vivado but can be installed separately:

1. Navigate to <Vivado_Install>/data/xicom/cable_drivers/nt64
2. Run install_digilent.exe as Administrator
3. For CP210x, use Windows Update or download from Silicon Labs

Linux users should run the installation script:

bash

cd <Vivado_Install>/data/xicom/cable_drivers/lin64/install_script/install_drivers

sudo ./install_drivers

Creating Your First Vivado Project for ZC702

Let’s build a simple hardware design that blinks LEDs—the embedded equivalent of “Hello World.”

Project Creation Steps

1. Launch Vivado and select “Create Project”
2. Name your project (e.g., zc702_led_blink)
3. Select RTL Project, leave “Do not specify sources” unchecked
4. In Default Part, switch to the Boards tab
5. Select “ZYNQ-7 ZC702 Evaluation Board”

Vivado includes board definition files for the ZC702 that automatically configure pin constraints and peripheral settings.

Adding the Zynq Processing System

In the IP Integrator:

1. Create a new Block Design (name it system)
2. Click Add IP and search for “ZYNQ7 Processing System”
3. Double-click to add it to the canvas
4. Click “Run Block Automation” when prompted

The automation applies ZC702-specific settings for DDR3 timing, clock frequencies, and peripheral configurations. Without board files, you’d need to configure these manually—a process that takes hours and invites errors.

Connecting User Logic

Add GPIO for LED control:

1. Add IP → AXI GPIO
2. Run Connection Automation
3. Double-click the GPIO block
4. Enable GPIO, set width to 8
5. Connect to external port

After validation, generate the bitstream. This takes 10-15 minutes on a typical workstation.

Software Development with Vitis

With hardware exported as an XSA file, we move to software development.

Creating a Platform Project

1. Launch Vitis IDE
2. Create new Platform Project
3. Browse to your XSA file from Vivado
4. Select “standalone” domain with ps7_cortexa9_0 processor

Building a Bare-Metal Application

Create an Application Project using the Hello World template as a starting point, then modify for GPIO control:

c

#include “xparameters.h”

#include “xgpio.h”

#include “sleep.h”

#define GPIO_DEVICE_ID XPAR_AXI_GPIO_0_DEVICE_ID

#define LED_CHANNEL 1

int main(void) {

    XGpio gpio;

    u32 led_value = 0x01;

    XGpio_Initialize(&gpio, GPIO_DEVICE_ID);

    XGpio_SetDataDirection(&gpio, LED_CHANNEL, 0x00);

    while(1) {

        XGpio_DiscreteWrite(&gpio, LED_CHANNEL, led_value);

        led_value = (led_value << 1) | (led_value >> 7);

        usleep(100000);

    }

    return 0;

}

Programming and Debug

1. Connect USB to J2
2. Power on the ZC702 in JTAG mode (SW16 = 00000)
3. In Vitis, right-click your application
4. Select “Run As” → “Launch Hardware”

The LEDs should begin their pattern within seconds.

Read more Xilinx Products:

Linux Development on ZC702

For Linux-based projects, PetaLinux provides the fastest path to a running system.

Building from the ZC702 BSP

Download the ZC702 BSP from AMD’s website, then:

# Create project from BSP

petalinux-create -t project -s xilinx-zc702-v2023.2-final.bsp

# Enter project directory

cd xilinx-zc702-2023.2

# Optional: Reconfigure with custom hardware

petalinux-config –get-hw-description=<path_to_xsa>

# Build the system

petalinux-build

# Generate boot images

petalinux-package –boot –fsbl images/linux/zynq_fsbl.elf \

    –fpga images/linux/system.bit –u-boot

Preparing the SD Card

Format the SD card with two partitions:

Partition	Type	Size	Contents
BOOT	FAT32	500 MB	BOOT.BIN, image.ub, boot.scr
rootfs	ext4	Remaining	Root filesystem

Copy BOOT.BIN, image.ub, and boot.scr to the FAT32 partition. Extract rootfs.tar.gz to the ext4 partition.

First Linux Boot

Set SW16 for SD boot (00110), insert the card, and power on. Connect a terminal at 115200 baud to see the boot messages. Default credentials are root/root.

FMC Expansion Capabilities

The two FMC LPC connectors on the ZC702 enable significant I/O expansion. Each connector provides:

Signal Type	Count
Single-ended I/O	68
Differential pairs	34
JTAG pass-through	Yes
I2C for EEPROM	Yes
Power (VADJ)	Configurable

Popular FMC cards for the ZC702 include:

FMC Card	Application
HDMI Input (Imageon)	Video capture
Ethernet FMC	Multi-port networking
AD-FMCOMMS2/3	Software-defined radio
FPGA Drive	NVMe SSD access

When using FMC cards, ensure J21 and J22 are set correctly for VADJ voltage. Most cards require 1.8V or 2.5V—check the FMC documentation before connecting.

Troubleshooting Common ZC702 Issues

Years of working with the ZC702 have taught me the common failure modes.

JTAG Connection Failures

If Vivado can’t detect the board:

1. Check SW10: Must be 01 for onboard Digilent module
2. Verify USB connection: Try different ports, avoid hubs
3. Press POR button: The power-on reset at SW4 often resolves detection issues
4. Check cable quality: Low-quality USB cables cause intermittent failures

Boot Failures

When the board won’t boot:

Symptom	Likely Cause	Solution
DS3 stays red	FPGA didn’t configure	Check SW16 mode, verify image
No UART output	Wrong COM port	Check Device Manager, try both USB ports
Stuck at U-Boot	SD card issue	Reformat FAT32, copy fresh images
DDR errors	Timing mismatch	Use board presets, verify VTT

Linux-Specific Issues

Common PetaLinux problems:

• Network not working: Check device tree for correct PHY address (88E1116R uses address 7)
• SD card not mounting: Verify partition table, check for ext4 filesystem support
• USB devices not detected: Enable USB host mode in device tree

Useful Resources and Downloads

Here are the essential resources for ZC702 development:

Resource	URL
ZC702 User Guide (UG850)	docs.amd.com
Zynq TRM (UG585)	docs.amd.com
Vivado Download	xilinx.com/support/download
PetaLinux Tools	xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/embedded-design-tools
ZC702 BSP	xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/embedded-design-tools
Board Schematics	xilinx.com/products/boards-and-kits/ek-z7-zc702-g
Xilinx Wiki	xilinx-wiki.atlassian.net
Embedded Design Tutorials	github.com/Xilinx/Embedded-Design-Tutorials

Frequently Asked Questions

Can I use the ZC702 without a Vivado license?

Yes, the XC7Z020 device on the ZC702 is supported by Vivado’s free WebPACK edition. You get full access to synthesis, implementation, and SDK functionality. The only limitations are some advanced features like partial reconfiguration.

What’s the difference between the ZC702 and ZC706?

The ZC706 features the larger XC7Z045 device with 350K logic cells versus the ZC702’s 85K cells. The ZC706 also includes GTX transceivers for high-speed serial protocols like PCIe and SATA. For most embedded projects, the ZC702 provides sufficient resources at a lower cost.

How do I update the QSPI flash on the ZC702?

You can program QSPI using Vitis or through U-Boot. In Vitis, use Program Flash (Xilinx → Program Flash) with the board in JTAG mode. Through U-Boot, boot via SD or JTAG, then use sf probe, sf erase, and sf write commands.

Why won’t my FMC card work with the ZC702?

Most FMC issues stem from incorrect VADJ voltage. Check J21 and J22 jumper settings match your FMC card requirements. Also verify the FMC connector being used (J3 or J4) matches your design’s pin constraints. Some FMC cards also require the PG signal assertion—see AR51438 for the fix.

What clock frequencies can I achieve on the ZC702?

The PS clock runs at 33.33 MHz and the PL receives a 200 MHz differential clock. The programmable Si570 oscillator can generate 10-810 MHz for custom PL clocking. Through PLLs, you can achieve much higher internal frequencies, though 200-300 MHz is typical for user logic.

Power Management and Monitoring

The ZC702 includes sophisticated power management that’s often overlooked. Understanding these features helps with power optimization and debugging.

Power Rail Monitoring

The TI power controllers on the ZC702 support PMBus monitoring. You can read voltage and current values through I2C:

Rail	Nominal Voltage	Typical Current
VCC1V0	1.0V	ARM cores, PL core
VCC1V8	1.8V	PS auxiliary, MIO
VCC3V3	3.3V	I/O banks, peripherals
VCCPINT	1.0V	PL internal
VCCPAUX	1.8V	PL auxiliary

The XADC block in the Zynq provides internal temperature and voltage monitoring. For thermal management, the XC7Z020 has a junction temperature limit of 85°C for commercial grade. I recommend monitoring this during high-utilization designs.

Power Sequencing

The ZC702 handles power sequencing automatically, but for custom board development, understanding the sequence matters:

1. 12V input applied
2. Core voltages ramp (VCC1V0, VCCPINT)
3. Auxiliary voltages follow (VCC1V8, VCCPAUX)
4. I/O voltages last (VCC3V3, VADJ)

The POR signal asserts when all rails are stable. If you experience intermittent boot issues, check the power good LED (DS13) and ensure the supply can handle inrush current.

Advanced Configuration Options

Encryption Key Backup

The ZC702 includes a TS518FE rechargeable battery (B1) for encryption key backup. The BBRAM stores the 256-bit AES key used for secure boot. This battery recharges when the board is powered and retains the key during power-off.

For production designs requiring secure boot, program the encryption key through Vivado’s Device Programmer. The key persists even after removing the board from power for several months.

Custom Clock Generation

The Silicon Labs Si570 oscillator at U28 supports I2C programming for frequencies from 10 MHz to 810 MHz. This enables precise clock requirements without external oscillators:

c

// Example: Configure Si570 for 148.5 MHz (HDMI pixel clock)

// Register values calculated from Si570 datasheet

u8 freq_regs[6] = {0x01, 0xC2, 0xBC, 0x01, 0x1E, 0xB8};

XIic_Send(IIC_BASE, SI570_ADDR, freq_regs, 6, XIIC_STOP);

The oscillator reverts to 156.25 MHz default after power cycle.

Conclusion

The ZC702 evaluation board remains one of the most capable Zynq development platforms available. Its comprehensive peripheral set, dual FMC expansion, and robust power system make it suitable for everything from initial prototyping to pre-production validation. With proper setup and the resources in this guide, you’ll move from unboxing to running applications quickly.

Whether you’re building bare-metal firmware, developing Linux drivers, or implementing custom hardware accelerators, the ZC702 provides the foundation you need. The investment in learning this platform pays dividends across all Zynq-based projects.