XC7A35T Datasheet & Pinout: Complete Artix-7 35T Guide

If you’ve been searching for the right FPGA for your next project, chances are you’ve come across the XC7A35T. I’ve worked with this chip across dozens of designs over the years, from motor control systems to SDR prototypes, and there’s a reason it keeps showing up on my desk. This guide covers everything you need to know about the Xilinx Artix 7 35T FPGA, from core specifications and pinout details to practical PCB design tips that’ll save you headaches down the road.

What Is the XC7A35T FPGA?

The XC7A35T is a mid-range FPGA from AMD (formerly Xilinx) belonging to the Artix-7 family. Built on a 28nm high-performance, low-power (HPL) process technology with high-k metal gate (HKMG), this device sits in the sweet spot between cost and capability that makes it attractive for volume production.

What sets the Artix 7 35T apart from other devices in its class is the combination of 33,280 logic cells, 90 DSP48E1 slices, and up to four GTP transceivers capable of 6.6 Gb/s line rates. That’s serious processing power for a chip that won’t break your BOM budget.

The Xilinx Artix 35T FPGA targets cost-sensitive applications where you still need real-time processing muscle. Think software-defined radio frontends, machine vision preprocessing, industrial motor drives, or IoT gateways that need to crunch data locally before shipping it upstream.

XC7A35T Core Specifications at a Glance

Before diving into the details, here’s the essential datasheet information for the Xilinx Artix 7 35T:

What’s worth noting here is that the XC7A35T is actually fabricated on the same die as the XC7A50T. Xilinx uses software limits to differentiate the two products, which means you get excellent routing even at high utilization since the physical resources far exceed the advertised limits.

Understanding XC7A35T Package Options and Pinouts

Choosing the right package for your Artix 7 35T design is one of the first critical decisions you’ll make. Each package offers different I/O counts, transceiver availability, and PCB footprint implications.

Available Package Types for XC7A35T

The CPG236 is your go-to for tight spaces where you still need high-speed serial connectivity. At just 10x10mm with 0.5mm ball pitch, it’s compact but demands careful PCB stackup planning. I’ve seen plenty of designs struggle with escape routing on this package, so plan for at least 6 layers if you’re going this route.

The CSG324 gives you maximum I/O (210 pins) without transceivers. It’s ideal for parallel interface heavy designs like camera sensors or display controllers.

For designs requiring all four GTP transceivers plus maximum I/O flexibility, the FGG484 is the workhorse. The 1.0mm ball pitch makes escape routing more manageable, and the 23x23mm footprint gives you room to place decoupling capacitors close to the power balls.

Pinout Architecture and I/O Banking

The Xilinx Artix 7 35T organizes its I/O into five banks, each capable of operating at different voltage levels between 1.2V and 3.3V. This is crucial for mixed-voltage systems where you might interface with 1.8V DDR memory on one side and 3.3V sensors on another.

All I/O banks on the XC7A35T are High-Range (HR) banks, supporting VCCO levels from 1.2V to 3.3V. This gives you flexibility, but remember that within a single bank, all pins share the same VCCO. Planning your I/O assignment early avoids painful redesigns later.

Each bank contains clock-capable pins (MRCC and SRCC) that can drive regional or global clock networks. For high-speed interfaces, place your clock inputs on these dedicated pins to minimize jitter.

Power Supply Requirements for XC7A35T Designs

Getting power right is non-negotiable with FPGAs. The Artix 7 35T requires multiple supply rails, and sequencing matters.

XC7A35T Power Rail Specifications

Recommended Power-On Sequence

The recommended sequence for minimum current draw is:

1. VCCINT / VCCBRAM (can ramp simultaneously if same voltage)
2. VCCAUX
3. VCCO (all banks)

For GTP transceiver power, bring up VCCINT and VMGTAVCC first (can be simultaneous), followed by VMGTAVTT. Reversing this sequence can cause excessive current draw during ramp-up, so don’t skip this step in your schematic review.

Decoupling Capacitor Guidelines

Based on my experience and AMD’s UG483 recommendations, here’s what works:

For the smaller packages like CPG236, getting all these capacitors placed properly requires creative via placement and possibly embedded capacitance in your stackup.

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XC7A35T Part Number Decoder

Ordering the right part starts with understanding Xilinx’s naming convention. Here’s how to decode an XC7A35T part number:

Example: XC7A35T-2FGG484C

Speed Grade Options

Temperature Grade Options

For most prototyping work, the -1C variants offer the best price-to-performance ratio. Move to -2 or -I grades when your design demands it.

Architecture Deep Dive: What’s Inside the Artix 7 35T

Understanding the internal architecture helps you write better RTL and hit timing closure faster. Let me walk through the key building blocks.

Configurable Logic Blocks (CLBs)

The XC7A35T contains 2,600 CLBs, each comprising two slices. This gives you 5,200 slices total, with each slice containing four 6-input LUTs and eight flip-flops. About 30% of slices are SLICEMs that can function as distributed RAM or shift registers; the rest are SLICELs for pure logic.

Each 6-input LUT can implement any Boolean function of six inputs, or be configured as two 5-input LUTs with shared inputs. For memory, SLICEMs can implement 64-bit single-port RAM, 32-bit dual-port RAM, or 32-bit shift registers (SRL32).

DSP48E1 Slices

The 90 DSP48E1 slices are the number-crunching workhorses of the Xilinx Artix 35T FPGA. Each slice contains:

• Pre-adder (25-bit)
• 25 x 18 multiplier
• 48-bit ALU with accumulator
• Pattern detector

Running at 464 MHz on a -1 speed grade, you’re looking at approximately 83 GMAC/s peak performance. That’s enough for respectable DSP work in audio, software-defined radio, or image processing pipelines.

Block RAM

The 50 36-Kb block RAMs (1,800 Kb total) support true dual-port operation with independent clocks on each port. Each block can be configured as:

• 36K x 1 single-port
• 18K x 2 (split mode)
• 512 x 72 FIFO
• Various aspect ratios down to 32K x 1

The built-in FIFO logic saves you from implementing FIFO controllers in fabric, which is particularly useful for clock domain crossing or buffering streaming data.

GTP Transceivers

Depending on your package choice, the XC7A35T provides two or four GTP transceivers supporting 600 Mb/s to 6.6 Gb/s line rates. These are essential for:

• PCIe Gen2 (up to x4)
• SATA/SAS
• Gigabit Ethernet SGMII
• Custom serial protocols
• Fiber optic communication

Each GTP includes a TX and RX PLL, 8B/10B encoder/decoder, and clock recovery circuitry. The low-power mode is particularly useful for chip-to-chip links where you don’t need full speed.

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XADC: Integrated Analog Interface

One often-overlooked feature is the XADC block, which provides dual 12-bit ADCs running at 1 MSPS. Beyond external analog inputs, the XADC monitors on-chip temperature and supply voltages, enabling system health monitoring without external components.

You get up to 17 analog input channels on packages that expose the XADC pins. This is surprisingly useful for designs that need basic sensor interfaces without an external ADC.

XC7A35T Development Boards Worth Considering

Getting started with the Artix 7 35T is straightforward thanks to several excellent development boards:

Basys 3

The Basys 3 is the go-to board for education and prototyping. The built-in peripherals mean you can start blinking LEDs within minutes of installation.

Cmod A7-35T

The Cmod A7 is perfect for embedding an FPGA in custom circuits. The DIP form factor means you can plug it into a breadboard alongside your analog circuitry and iterate quickly.

ALINX AX7A035

For more advanced prototyping with high-speed interfaces, the AX7A035 offers PCIe 2.0, dual SFP ports, Gigabit Ethernet, HDMI, and DDR3 memory. It’s more expensive but includes the peripherals needed for serious system development.

Practical Applications for the XC7A35T

Having deployed the Artix 7 35T across various projects, here are the applications where it excels:

Motor Control and Industrial Automation

The combination of 90 DSP slices and low-latency I/O makes the XC7A35T ideal for field-oriented control (FOC) algorithms. You can close a current loop in under 10 microseconds while still handling position feedback and communication protocols in the remaining logic.

Software-Defined Radio (SDR)

For SDR front-ends that don’t need Kintex-level performance, the Artix 7 35T delivers. The DSP slices handle digital downconversion, filtering, and demodulation, while the GTP transceivers can connect directly to high-speed ADC/DAC interfaces.

Machine Vision and Image Processing

Pre-processing camera data before sending it to a host processor is a sweet spot application. The block RAMs provide frame buffering, while the logic fabric handles debayering, color correction, or edge detection algorithms.

Embedded Computing with MicroBlaze

Xilinx’s MicroBlaze soft processor runs comfortably on the XC7A35T, leaving room for custom accelerators. Combined with DDR3 support through the memory controller IP, you can build complete embedded systems.

IoT Gateways and Protocol Bridges

The XC7A35T’s mix of parallel I/O and serial transceivers makes it natural for protocol conversion and aggregation tasks. Interface legacy industrial buses to modern Ethernet or wireless backhaul.

Configuration Options and FPGA Programming

The XC7A35T supports multiple configuration modes, giving you flexibility in how you deploy your bitstream:

For production, Master SPI with a QSPI flash is the most common approach. The XC7A35T bitstream is approximately 17.5 Mbits, so a 32 Mbit flash gives you room for multiple configurations or golden images.

The device supports 256-bit AES encryption with HMAC/SHA-256 authentication for secure boot applications. This is essential for designs where IP protection or tamper resistance matters.

PCB Design Tips for XC7A35T Projects

After laying out numerous Artix-7 boards, here are the hard-won lessons:

Power Integrity

• Place ferrite beads between analog and digital grounds only if you’re using XADC extensively; otherwise, a solid ground plane works better.
• Keep VCCINT plane polygons uninterrupted under the device. Splits cause inductance that shows up as supply noise.
• Use 0402 or smaller decoupling capacitors for the 0.5mm pitch packages. Anything larger won’t fit.

High-Speed Signal Routing

• Match trace lengths within DDR memory groups to within 10 mils.
• Keep GTP differential pairs at 100 ohms differential impedance with controlled spacing.
• Avoid routing high-speed signals on outer layers where possible; buried stripline gives better EMI performance.

Thermal Management

The XC7A35T isn’t a particularly hot device, but don’t ignore thermals entirely. In still air, the bare chip can handle typical logic designs. For designs heavily using DSP slices or transceivers at full rate, consider a small heatsink or increased airflow.

Design for Manufacturing

• Include test points on clock signals and critical I/O for production testing.
• Break out JTAG to a standard header even if you plan to use SPI boot in production.
• Consider adding a configuration mode selection circuit if you might need to recover from a bad bitstream.

Useful Resources and Documentation Downloads

Here are the essential documents and tools for XC7A35T development:

Official AMD/Xilinx Documentation

• DS180: 7 Series FPGAs Overview (device comparison, architecture summary)
• DS181: Artix-7 FPGAs Data Sheet: DC and AC Switching Characteristics
• UG471: 7 Series FPGAs SelectIO Resources User Guide
• UG472: 7 Series FPGAs Clocking Resources User Guide
• UG473: 7 Series FPGAs Memory Resources User Guide
• UG474: 7 Series FPGAs Configurable Logic Block User Guide
• UG475: 7 Series FPGAs Packaging and Pinout (pinout files)
• UG479: 7 Series FPGAs DSP48E1 Slice User Guide
• UG482: 7 Series FPGAs GTP Transceivers User Guide
• UG483: 7 Series FPGAs PCB Design Guide

Development Tools

• Vivado Design Suite: Download the free WebPACK edition which fully supports all Artix-7 devices
• Xilinx Power Estimator (XPE): Spreadsheet tool for power estimation
• Artix-7 Pinout Files: Available at AMD’s website in CSV and TXT formats

CAD Resources

• Component symbols, footprints, and 3D models are available through Ultra Librarian, SnapEDA, and Octopart
• Board vendors like Digilent provide reference schematics for their development boards

Frequently Asked Questions About XC7A35T

What is the difference between XC7A35T and XC7A50T?

Both devices are fabricated on the same physical die. The XC7A35T has software-enforced limits that restrict usage to 33,280 logic cells (versus 52,160 on the XC7A50T) and proportionally fewer DSP slices and block RAMs. However, because the physical resources exist, an XC7A35T design at 100% utilization still routes cleanly since the placer has the full die to work with.

Which package should I choose for my XC7A35T design?

If you need maximum I/O without transceivers, go with CSG324 (210 I/O). For designs requiring GTP transceivers in a compact footprint, CPG236 provides two transceivers in 10x10mm. The FGG484 is the most flexible option with four transceivers and 250 I/O, but requires more PCB real estate.

Can I use the XC7A35T for PCIe applications?

Yes. The XC7A35T includes a hard PCIe block supporting Gen2 x4 configuration. However, you need a package with GTP transceivers exposed (CPG236, CSG325, or FGG484) since PCIe requires the high-speed serial links.

What is the typical power consumption of the XC7A35T?

Power varies dramatically with design utilization and toggle rates. A lightly loaded design might consume under 500 mW total, while a design using most DSP slices and transceivers at full speed could approach 2-3W. Use the Xilinx Power Estimator tool with your actual design parameters for accurate numbers.

Is the XC7A35T suitable for production designs or only prototyping?

Absolutely suitable for production. The Artix-7 family has been in volume manufacturing since 2011, with device longevity assured through at least 2040 according to AMD’s product lifecycle documentation. Many commercial products from industrial controllers to medical devices use the XC7A35T.

Conclusion: Is the XC7A35T Right for Your Project?

The XC7A35T occupies a practical middle ground in the FPGA landscape. It’s not the cheapest option (look at Spartan-7 for that), nor the most powerful (Kintex-7 or UltraScale for demanding applications). But for a huge range of real-world applications, it delivers exactly what’s needed without excess.

What I appreciate most about the Xilinx Artix 7 35T is the ecosystem maturity. The Vivado toolchain is stable, IP cores are plentiful, and community support through forums and GitHub repositories means you’re rarely the first person to solve a particular problem.

If your design needs 30-50K logic cells, a handful of DSP slices, modest block RAM, and optionally high-speed transceivers, the XC7A35T deserves serious consideration. The combination of capability, cost, and long-term availability makes it a workhorse choice that rarely disappoints.

Start with one of the development boards, validate your concept, and you’ll have a clear path to a production-ready custom board built around this capable FPGA.