What Is the XC2S200-6FGG1173C?
The XC2S200-6FGG1173C is a high-performance Field-Programmable Gate Array (FPGA) from Xilinx’s Spartan-II family, built on an advanced 0.18µm process node with a 2.5V core voltage supply. Designed for engineers who need dense programmable logic in a lead-free (Pb-free) package, the XC2S200-6FGG1173C delivers 200,000 system gates, 5,292 logic cells, and operates at speeds up to 200 MHz — all within a commercial temperature range. Whether you’re prototyping a digital signal processing pipeline or replacing a costly mask-programmed ASIC, this device offers unmatched flexibility and cost efficiency.
For a broader view of compatible devices, explore our full range of Xilinx FPGA solutions.
XC2S200-6FGG1173C Quick Specifications Overview
| Parameter |
Value |
| Manufacturer |
Xilinx (now AMD) |
| Part Number |
XC2S200-6FGG1173C |
| Family |
Spartan-II |
| System Gates |
200,000 |
| Logic Cells |
5,292 |
| CLB Array |
28 × 42 |
| Total CLBs |
1,176 |
| Max User I/O |
284 |
| Distributed RAM |
75,264 bits |
| Block RAM |
56K bits |
| Speed Grade |
-6 (Fastest) |
| Package |
FGG1173 (1173-ball Fine-Pitch BGA, Pb-free) |
| Temperature Range |
Commercial (0°C to +85°C) |
| Core Voltage (VCCINT) |
2.5V |
| Process Node |
0.18µm |
| Max System Clock |
Up to 200 MHz |
| DLLs |
4 (one per corner) |
| RoHS Compliance |
Yes (Pb-free “G” package) |
Decoding the XC2S200-6FGG1173C Part Number
Understanding the part number is essential for procurement and design verification. Each segment of XC2S200-6FGG1173C carries precise meaning:
| Segment |
Meaning |
| XC |
Xilinx commercial device |
| 2S |
Spartan-II family |
| 200 |
200,000 system gates |
| -6 |
Speed grade -6 (fastest available for Spartan-II) |
| FGG |
Fine-Pitch Ball Grid Array, Pb-free (G = lead-free) |
| 1173 |
1,173 total ball count |
| C |
Commercial temperature range (0°C to +85°C) |
Note: The “-6” speed grade is exclusively available in the commercial temperature range. Industrial-grade variants (-5I) are not offered at this speed.
XC2S200-6FGG1173C: Core Architecture & Logic Resources
Configurable Logic Blocks (CLBs)
The XC2S200-6FGG1173C is built around a 28×42 array of Configurable Logic Blocks, yielding 1,176 total CLBs. Each CLB contains two slices, and every slice includes two 4-input Look-Up Tables (LUTs) and two flip-flops. This architecture enables compact, efficient implementation of combinational and sequential logic.
Distributed and Block RAM
| Memory Type |
Capacity |
| Distributed RAM (in CLBs) |
75,264 bits |
| Block RAM (dedicated) |
56,192 bits (56K) |
| Total On-Chip RAM |
~131K bits |
Distributed RAM is embedded within the CLB array for fast, low-latency storage. The two dedicated block RAM columns sit on opposite edges of the die, making them ideal for FIFOs, lookup tables, and small data buffers.
Clock Management: Delay-Locked Loops (DLLs)
The XC2S200-6FGG1173C features four Delay-Locked Loops (DLLs), one positioned at each corner of the die. These DLLs provide:
- Zero-delay clock distribution
- Frequency synthesis and division
- Phase shifting for synchronous interface design
- Duty-cycle correction
Input/Output Blocks (IOBs)
With up to 284 maximum user I/O pins, the XC2S200-6FGG1173C supports a wide range of interface standards. IOBs are arranged along the periphery of the die and include programmable pull-up/pull-down resistors, slew rate control, and 3-state capability.
XC2S200-6FGG1173C Package Details: FGG1173
The FGG1173 is a 1,173-ball Fine-Pitch Ball Grid Array (FBGA) package with Pb-free (RoHS-compliant) solder balls, denoted by the “G” in “FGG.” This package is the largest offered for the XC2S200 device and provides the highest available user I/O density.
| Package Feature |
Detail |
| Package Type |
Fine-Pitch BGA (FBGA) |
| Ball Count |
1,173 |
| Lead-Free (Pb-free) |
Yes |
| Designator |
FGG (G = Pb-free version) |
| Mounting Style |
Surface Mount (SMD) |
| Temperature Marking |
C = Commercial |
The FGG1173 package’s large ball count makes the XC2S200-6FGG1173C especially suited to high-pin-count applications where connectivity density is critical.
Spartan-II Family Comparison: Where Does the XC2S200 Stand?
The XC2S200-6FGG1173C sits at the top of the Spartan-II family in terms of gate count and logic resources. Here is how it compares to other members of the family:
| Device |
Logic Cells |
System Gates |
CLB Array |
Max User I/O |
Dist. RAM (bits) |
Block RAM (bits) |
| XC2S15 |
432 |
15,000 |
8 × 12 |
86 |
6,144 |
16K |
| XC2S30 |
972 |
30,000 |
12 × 18 |
92 |
13,824 |
24K |
| XC2S50 |
1,728 |
50,000 |
16 × 24 |
176 |
24,576 |
32K |
| XC2S100 |
2,700 |
100,000 |
20 × 30 |
176 |
38,400 |
40K |
| XC2S150 |
3,888 |
150,000 |
24 × 36 |
260 |
55,296 |
48K |
| XC2S200 |
5,292 |
200,000 |
28 × 42 |
284 |
75,264 |
56K |
The XC2S200 offers the largest CLB array, the most distributed RAM, and the highest block RAM capacity in the entire Spartan-II lineup, making the XC2S200-6FGG1173C the go-to option when design complexity demands maximum resources.
Key Features of the XC2S200-6FGG1173C
High-Speed -6 Grade Performance
The -6 speed grade is the fastest available in the Spartan-II family and is exclusively offered for commercial temperature devices. It enables maximum system frequencies up to 200 MHz, making the XC2S200-6FGG1173C suitable for demanding real-time applications.
Pb-Free (RoHS-Compliant) Construction
The “G” in the FGG1173 package designator confirms full RoHS compliance with Pb-free solder balls. This is critical for designs targeting global markets with environmental regulations (EU RoHS Directive, WEEE compliance).
Superior ASIC Replacement Capability
The Spartan-II XC2S200-6FGG1173C is a proven replacement for mask-programmed ASICs. Unlike ASICs, it eliminates upfront non-recurring engineering (NRE) costs, long development cycles, and the irreversibility of fixed silicon. Designs can be updated in the field through reprogramming — a capability that mask-programmed ASICs simply cannot offer.
Flexible I/O Banking
IOBs are grouped into banks that share a common VCCO supply rail, allowing the XC2S200-6FGG1173C to interface with multiple I/O voltage standards in a single design by assigning different banks to different voltages.
XC2S200-6FGG1173C Electrical Characteristics
| Parameter |
Min |
Typical |
Max |
Unit |
| Core Supply Voltage (VCCINT) |
2.375 |
2.5 |
2.625 |
V |
| I/O Supply Voltage (VCCO) |
1.14 |
— |
3.465 |
V |
| Input High Voltage (VIH) |
2.0 |
— |
VCCO+0.3 |
V |
| Input Low Voltage (VIL) |
−0.3 |
— |
0.8 |
V |
| Operating Temperature |
0 |
— |
+85 |
°C |
| Maximum System Clock |
— |
— |
200 |
MHz |
Supported I/O Standards
The XC2S200-6FGG1173C IOBs are programmable to support multiple I/O standards, which is essential for interfacing with diverse system components:
| I/O Standard |
Type |
| LVTTL |
Single-Ended |
| LVCMOS (3.3V, 2.5V, 1.8V) |
Single-Ended |
| PCI (3.3V) |
Single-Ended |
| GTL / GTL+ |
Single-Ended |
| HSTL (Class I, III) |
Single-Ended |
| SSTL2 / SSTL3 |
Single-Ended |
Design Tools & Programming Support
Xilinx ISE Design Suite
The XC2S200-6FGG1173C is fully supported by the Xilinx ISE Design Suite (legacy tool). ISE supports HDL entry (VHDL and Verilog), synthesis, implementation, bitstream generation, and device programming via JTAG.
JTAG Boundary Scan (IEEE 1149.1)
Full JTAG boundary scan support is built into the XC2S200-6FGG1173C, enabling in-system programming and board-level testing without removing the device from the PCB.
Configuration Options
The XC2S200-6FGG1173C supports several configuration modes:
| Configuration Mode |
Description |
| Master Serial |
Uses an external serial PROM |
| Slave Serial |
Driven by an external host |
| Master Parallel (Byte-Wide) |
Fast byte-wide parallel loading |
| Slave Parallel |
Byte-wide parallel loading by host |
| JTAG (Boundary Scan) |
IEEE 1149.1-compliant in-system config |
Typical Applications for the XC2S200-6FGG1173C
The combination of 200K system gates, 284 I/O pins, and -6 speed grade makes this device well-suited for a wide range of industries and applications:
| Application Area |
Use Case Examples |
| Digital Signal Processing (DSP) |
FIR/IIR filters, FFT processors, audio codecs |
| Communications |
Protocol bridges, serializer/deserializer, line interfaces |
| Industrial Control |
Motor control, PLC glue logic, sensor interfaces |
| Networking |
Packet processing, switching fabric, network interface cards |
| Consumer Electronics |
Display controllers, video processing, image capture |
| Test & Measurement |
Data acquisition, logic analyzers, pattern generators |
| Automotive |
ADAS prototyping, CAN/LIN interface logic |
| Embedded Systems |
Soft-core processors, co-processing engines |
XC2S200-6FGG1173C vs. Common Alternatives
Engineers often compare the XC2S200-6FGG1173C against similar Spartan-II and Spartan-IIE variants. Here is a concise comparison:
| Part Number |
Gates |
Speed |
Package |
Temp |
Pb-Free |
| XC2S200-6FGG1173C |
200K |
-6 |
FGG1173 |
Commercial |
✅ Yes |
| XC2S200-6FGG456C |
200K |
-6 |
FGG456 |
Commercial |
✅ Yes |
| XC2S200-5FGG456C |
200K |
-5 |
FGG456 |
Commercial |
✅ Yes |
| XC2S200-6PQ208C |
200K |
-6 |
PQ208 |
Commercial |
❌ No |
| XC2S150-6FGG456C |
150K |
-6 |
FGG456 |
Commercial |
✅ Yes |
The XC2S200-6FGG1173C is the only variant combining the peak -6 speed grade, maximum gate count, Pb-free compliance, and the high-density 1173-ball package, making it the top choice when pin count and performance are both required.
Ordering Information for XC2S200-6FGG1173C
When ordering the XC2S200-6FGG1173C, use the complete part number to ensure you receive the correct speed grade, package, and temperature variant. The table below summarizes ordering identifiers:
| Field |
Value |
| Complete Part Number |
XC2S200-6FGG1173C |
| Manufacturer |
Xilinx / AMD |
| ECCN |
EAR99 (general classification; verify with supplier) |
| Package Description |
1173-Ball Fine-Pitch BGA, Pb-free |
| Operating Temp |
0°C to +85°C (Commercial) |
| Speed Grade |
-6 |
| RoHS |
Compliant |
Frequently Asked Questions (FAQ)
What does the “-6” speed grade mean in XC2S200-6FGG1173C?
The “-6” speed grade indicates the fastest performance tier available for the Spartan-II XC2S200. It supports system clock frequencies up to 200 MHz and is only available in the commercial temperature range (0°C to +85°C). It is not offered in industrial or automotive grades.
What is the FGG1173 package?
FGG1173 stands for Fine-Pitch Ball Grid Array with 1,173 solder balls in a Pb-free (lead-free) configuration. The “G” in FGG designates the Pb-free variant. This package provides the highest I/O pin access for the XC2S200 device.
Is the XC2S200-6FGG1173C RoHS compliant?
Yes. The “G” in the FGG1173 package designator confirms the use of lead-free solder balls, making this part RoHS-compliant and suitable for environmentally regulated markets worldwide.
Can the XC2S200-6FGG1173C replace an ASIC?
Yes. The Spartan-II family was specifically engineered as a cost-effective ASIC replacement. The XC2S200-6FGG1173C avoids NRE charges, long tapeout cycles, and the fixed nature of ASIC silicon. It supports in-field reprogramming, enabling design changes without hardware swaps.
What software do I need to program the XC2S200-6FGG1173C?
The primary tool is the Xilinx ISE Design Suite, which supports the full design flow from RTL entry through bitstream generation. JTAG-based programming is performed with Xilinx iMPACT or compatible third-party tools.
What configuration modes does the XC2S200-6FGG1173C support?
It supports Master Serial, Slave Serial, Master Parallel (byte-wide), Slave Parallel, and JTAG (IEEE 1149.1) configuration modes. An external PROM (e.g., Xilinx XCF-series) is commonly used for autonomous boot in Master Serial mode.
Summary
The XC2S200-6FGG1173C is a top-tier member of the Xilinx Spartan-II FPGA family, delivering 200,000 system gates, 5,292 logic cells, 284 I/O pins, four DLLs, and 131K bits of total on-chip memory — all in a Pb-free 1173-ball FBGA package at the fastest available -6 speed grade. Its combination of commercial-grade performance, RoHS compliance, and in-system reprogrammability makes it an outstanding choice for engineers designing high-speed digital systems across communications, DSP, industrial, and embedded applications.
