Product Overview: XC17128EPC20C Configuration Memory
The XC17128EPC20C is a high-reliability serial configuration PROM (Programmable Read-Only Memory) manufactured by Xilinx (now AMD). This 128-kilobit one-time programmable (OTP) memory device is specifically designed for storing configuration data for Xilinx FPGA devices. The XC17128EPC20C provides a cost-effective, non-volatile solution for FPGA configuration in commercial applications.
XC17128EPC20C Key Features and Benefits
High-Performance Configuration Memory
The XC17128EPC20C delivers reliable FPGA configuration with its serial interface design. This configuration PROM ensures your FPGA loads its programming data automatically upon power-up, eliminating the need for external processors or complex boot sequences.
Industrial-Grade Reliability
Built with Xilinx’s proven OTP technology, the XC17128EPC20C offers exceptional data retention and endurance. The device maintains configuration integrity across thousands of power cycles, making it ideal for embedded systems requiring long-term reliability.
Easy Integration Design
The 20-pin PLCC (Plastic Leaded Chip Carrier) package provides straightforward PCB integration with standard footprints and socket options for development and production flexibility.
XC17128EPC20C Technical Specifications
Memory Specifications
| Parameter |
Value |
| Memory Density |
128 Kbit (131,072 bits) |
| Memory Organization |
16,384 x 8 bits |
| Memory Type |
OTP (One-Time Programmable) |
| Technology |
CMOS EPROM |
| Data Output |
Serial |
| Configuration Interface |
Master Serial Mode |
Electrical Characteristics
| Parameter |
Min |
Typ |
Max |
Unit |
| Supply Voltage (VCC) |
4.5 |
5.0 |
5.5 |
V |
| Input High Voltage (VIH) |
2.0 |
– |
VCC+0.5 |
V |
| Input Low Voltage (VIL) |
-0.5 |
– |
0.8 |
V |
| Output High Voltage (VOH) |
2.4 |
– |
– |
V |
| Output Low Voltage (VOL) |
– |
– |
0.4 |
V |
| Supply Current (ICC) |
– |
5 |
10 |
mA |
| Standby Current |
– |
100 |
500 |
µA |
Timing Parameters
| Parameter |
Value |
Unit |
| Maximum Clock Frequency |
10 |
MHz |
| Clock to Data Output Delay |
– |
40 ns max |
| Reset Pulse Width |
100 |
ns min |
| Power-On Reset Time |
– |
200 µs max |
XC17128EPC20C Package Information
Physical Specifications
| Attribute |
Specification |
| Package Type |
PLCC-20 (Plastic Leaded Chip Carrier) |
| Pin Count |
20 Pins |
| Package Dimensions |
9.78mm x 9.78mm |
| Lead Pitch |
1.27mm |
| Mounting Type |
Surface Mount / Through-Hole Socket |
| Weight |
Approximately 1.5g |
Pin Configuration
| Pin Number |
Pin Name |
Function |
| 1 |
DATA |
Serial Data Output |
| 2 |
CEO |
Chip Enable Output (Cascade) |
| 3-6 |
NC |
No Connection |
| 7 |
CLK |
Clock Input |
| 8 |
GND |
Ground |
| 9 |
VCC |
Power Supply (+5V) |
| 10-13 |
NC |
No Connection |
| 14 |
CE |
Chip Enable Input (Active Low) |
| 15 |
OE/RESET |
Output Enable / Reset (Active Low) |
| 16-19 |
NC |
No Connection |
| 20 |
VCC |
Power Supply (+5V) |
XC17128EPC20C Operating Conditions
Environmental Ratings
| Parameter |
Commercial Grade (C) |
| Operating Temperature |
0°C to +70°C |
| Storage Temperature |
-65°C to +150°C |
| Humidity (Non-Condensing) |
5% to 95% RH |
| Data Retention |
20+ Years |
Quality and Compliance
| Standard |
Status |
| RoHS Compliance |
RoHS Compliant |
| Lead-Free |
Available |
| ESD Sensitivity |
Class 1 (HBM) |
| Moisture Sensitivity Level |
MSL 3 |
Compatible FPGA Devices for XC17128EPC20C
The XC17128EPC20C configuration PROM is compatible with various Xilinx FPGA families. The 128Kbit capacity supports the following devices:
Supported FPGA Families
| FPGA Family |
Compatible Devices |
| XC3000 Series |
XC3020, XC3030, XC3042 |
| XC4000 Series |
XC4003, XC4005 |
| Spartan Series |
XCS05, XCS10 |
| XC5200 Series |
XC5202, XC5204 |
XC17128EPC20C Application Guide
Typical Application Circuit
The XC17128EPC20C connects directly to Xilinx FPGA configuration pins in Master Serial mode. Key connections include:
- DATA pin → FPGA DIN (Configuration Data Input)
- CLK pin → FPGA CCLK (Configuration Clock)
- CE pin → Directly connect to GND or FPGA control
- OE/RESET pin → FPGA INIT or system reset
- CEO pin → Next PROM CE (for daisy-chain configuration)
Design Recommendations
Power Supply Considerations
Implement proper decoupling with a 0.1µF ceramic capacitor placed close to each VCC pin. For enhanced noise immunity, add a 10µF bulk capacitor on the power rail.
PCB Layout Guidelines
Keep clock traces short and away from high-speed digital signals. Maintain controlled impedance for the DATA and CLK signals when operating at higher frequencies.
Configuration Chain Setup
Multiple XC17128EPC20C devices can be cascaded using the CEO (Chip Enable Output) signal to configure larger FPGAs requiring more than 128Kbits of configuration data.
XC17128EPC20C Part Number Decoder
Understanding the XC17128EPC20C part number structure:
| Code Segment |
Meaning |
| XC17 |
Xilinx Configuration PROM Family |
| 128 |
Memory Density (128 Kbits) |
| E |
EPROM Technology (OTP) |
| PC |
PLCC Package Type |
| 20 |
Package Pin Count |
| C |
Commercial Temperature Grade (0°C to +70°C) |
Available Variants
| Part Number |
Package |
Temperature Range |
| XC17128EPC20C |
PLCC-20 |
Commercial (0°C to +70°C) |
| XC17128EPC20I |
PLCC-20 |
Industrial (-40°C to +85°C) |
| XC17128EPD8C |
PDIP-8 |
Commercial (0°C to +70°C) |
| XC17128EVO8C |
SOIC-8 |
Commercial (0°C to +70°C) |
Why Choose XC17128EPC20C for Your FPGA Design
Cost-Effective Solution
The XC17128EPC20C offers an economical configuration storage option for small to medium-sized FPGA designs, reducing overall bill of materials costs.
Proven Reliability
With over two decades of field-proven performance, Xilinx XC17 series PROMs have established a track record of reliability in commercial and industrial applications worldwide.
Simplified Design Flow
The XC17128EPC20C integrates seamlessly with Xilinx ISE development tools, enabling straightforward PROM file generation and device programming.
Secure Configuration
As a one-time programmable device, the XC17128EPC20C provides inherent design security by preventing configuration data extraction or modification.
XC17128EPC20C Ordering Information
| Attribute |
Details |
| Manufacturer |
AMD (formerly Xilinx) |
| Manufacturer Part Number |
XC17128EPC20C |
| Category |
Integrated Circuits (ICs) |
| Sub-Category |
Memory – Configuration PROMs for FPGAs |
| Series |
XC17 |
| Product Status |
Active / Legacy |
| Packaging |
Tube, Tray |
| Standard Pack Quantity |
23 pcs (Tube) |
Frequently Asked Questions About XC17128EPC20C
What is the XC17128EPC20C used for?
The XC17128EPC20C is a serial configuration PROM designed specifically for storing and loading configuration bitstreams into Xilinx FPGA devices during power-up.
Can the XC17128EPC20C be reprogrammed?
No, the XC17128EPC20C is a one-time programmable (OTP) device. Once programmed, the configuration data cannot be changed or erased.
What programmer supports the XC17128EPC20C?
The XC17128EPC20C can be programmed using Xilinx download cables (Platform Cable USB, Parallel Cable IV) with iMPACT software or third-party programmers supporting Xilinx PROM formats.
How do I generate a PROM file for XC17128EPC20C?
Use Xilinx ISE software to generate a .mcs or .exo PROM file from your FPGA bitstream (.bit file) using the iMPACT or PROMGEN utility.
What is the difference between XC17128EPC20C and XC17128EPC20I?
The “C” suffix indicates commercial temperature range (0°C to +70°C), while “I” indicates industrial temperature range (-40°C to +85°C).
Summary
The XC17128EPC20C remains a trusted configuration memory solution for Xilinx FPGA applications requiring 128Kbits of non-volatile storage. Its combination of reliability, ease of use, and cost-effectiveness makes it an excellent choice for commercial embedded systems, industrial controls, and consumer electronics designs utilizing compatible Xilinx FPGAs.
