Inquire: Call 0086-755-23203480, or reach out via the form below/your sales contact to discuss our design, manufacturing, and assembly capabilities.
Quote: Email your PCB files to Sales@pcbsync.com (Preferred for large files) or submit online. We will contact you promptly. Please ensure your email is correct.
Notes: For PCB fabrication, we require PCB design file in Gerber RS-274X format (most preferred), *.PCB/DDB (Protel, inform your program version) format or *.BRD (Eagle) format. For PCB assembly, we require PCB design file in above mentioned format, drilling file and BOM. Click to download BOM template To avoid file missing, please include all files into one folder and compress it into .zip or .rar format.
PCB Laminate Signal Integrity: How Material Properties Affect Insertion Loss and Impedance
When we talk about Signal Integrity (SI), we are essentially managing the “health” of an electrical signal as it travels from the transmitter to the receiver. At low frequencies, a wire is a wire. But as frequencies climb into the GHz range, the electromagnetic wave travels both within the copper and around it in the dielectric. This is where the choice of PCB laminate becomes the most significant variable in your design.
The Dielectric Constant (Dk): The Speed Limit of Your Signal
The Dielectric Constant, or $D_k$ (also known as relative permittivity, $\epsilon_r$), determines how fast an electromagnetic wave travels through the material. More importantly for layout, it dictates your trace width for a target impedance.
Why Dk Stability Matters
Most datasheets give you a $D_k$ value at a specific frequency (usually 1 GHz or 10 GHz). However, $D_k$ is not a constant. It changes with frequency (dispersion), temperature, and even moisture absorption.
Impedance Mismatches: If the $D_k$ varies across the board, your 50-ohm line might become a 45-ohm line, causing reflections.
Propagation Delay: In high-speed parallel buses or differential pairs, $D_k$ variations lead to “skew,” where signals arrive at different times, closing the timing window.
Dissipation Factor (Df): The Silent Signal Killer
If $D_k$ is about speed and impedance, the Dissipation Factor ($D_f$), or loss tangent, is about energy. Every time the electromagnetic field polarizes the molecules in the resin, a bit of energy is converted into heat. This is dielectric loss.
Material Class
Typical Df (@ 10GHz)
Application
Standard FR4
0.020 – 0.025
Low speed, general purpose
Mid-Loss
0.010 – 0.015
USB 3.0, PCIe Gen3
Low Loss
0.004 – 0.009
10G/25G Ethernet, PCIe Gen4
Ultra-Low Loss
0.001 – 0.003
112G SerDes, 5G mmWave, Radar
For long-reach traces, the difference between a Mid-Loss and an Ultra-Low Loss material can be the difference between a clear “eye” and a signal that is lost in the noise floor.
The Impact of Copper Surface Roughness (Skin Effect)
At high frequencies, current doesn’t flow through the center of a trace; it crowds toward the outer surface. This is the Skin Effect. If the copper surface is rough (to help it “grip” the laminate), the signal has to travel a longer physical path over the “peaks and valleys” of the copper.
This effectively increases the resistance of the trace and significantly boosts insertion loss. When specifying a PCB laminate signal integrity solution, you must choose the right copper foil:
STD (Standard): High roughness, good peel strength, terrible for >5 GHz.
VLP (Very Low Profile): Smoother, used for most high-speed designs.
HVLP (Hyper Low Profile): Mirror-like finish, essential for 28Gbps+ designs.
Glass Weave Effect: The Skew Nightmare
PCBs are made of woven glass bundles. Because the glass fibers have a $D_k \approx 6.0$ and the resin has a $D_k \approx 3.0$, the material is inhomogeneous. If one leg of a differential pair runs over a glass bundle and the other runs over a resin-rich area, they see different “effective” $D_k$.
How to Mitigate Glass Weave Issues
Use Spread Glass: Specifying “spread” or “flat” glass (like 1067 or 1086 styles) minimizes the resin-rich gaps.
Zig-Zag Routing: Route traces at a slight angle (10 degrees) to the weave.
Image Rotation: Have the fabricator rotate the entire board image on the production panel.
Choosing the Right Laminate Family
When I’m building a high-speed stackup, I look at the “loss budget.” If the budget is tight, I move away from standard epoxy-glass.
Using high-performance materials like those found in the ISOLA PCB lineup allows for much tighter control over these variables. For example, Isola TerraBA or Tachyon 100G are engineered specifically to have a very flat $D_k$ vs. frequency response and ultra-low $D_f$, which are critical for signal integrity. You can compare the SI performance of various grades on the ISOLA PCB technical page.
Comparison Table: SI Material Properties
Material
Dk (10 GHz)
Df (10 GHz)
Glass Style
Best For
FR408HR
3.68
0.0092
Standard/Spread
Mid-speed digital
I-Tera MT40
3.45
0.0031
Spread
RF & High Speed
Tachyon 100G
3.02
0.0021
Flat
100G+ Networking
Astra MT77
3.00
0.0017
Spread
mmWave/Radar
Practical Design Tips for Better Signal Integrity
Keep it Short: The easiest way to reduce insertion loss is to shorten the trace.
Backdrilling: On high-layer count boards, the “stub” of a via acts as a resonant capacitor that can completely kill high-frequency signals. Always backdrill signal vias.
Minimize Transitions: Every via is a discontinuity. Try to route critical signals on a single layer pair.
Reference Planes: Never route a high-speed signal over a split in the ground plane. The return current will find a long way back, creating EMI and destroying your impedance.
Moisture and Temperature: The Forgotten SI Variables
Epoxy resins are hygroscopic; they soak up water. Water has a $D_k$ of about 70. Even a tiny amount of moisture absorption in a humid environment will skyrocket your $D_k$ and $D_f$, causing your board to fail in the field even if it passed in the lab. Look for materials with moisture absorption rates below 0.2%.
Similarly, $D_k$ changes with temperature (the Thermal Coefficient of Dielectric Constant, or $T_cD_k$). For outdoor telecommunications gear, you need a $T_cD_k$ that is as close to zero as possible to keep the signal stable from winter to summer.
Useful Resources & Databases
IEEE Xplore: Research papers on dielectric characterization and skin effect modeling.
IPC-2141A: Design Guide for High-Speed Controlled Impedance Circuit Boards.
Simberian / Polar Instruments: Industry-standard tools for field-solving impedance and loss.
Signal Integrity Journal: Excellent technical articles on laminate selection and SI troubleshooting.
FAQ: PCB Laminate Signal Integrity
1. Does “Low Loss” always mean “High Tg”?
Often, yes, but they aren’t the same. Low loss refers to the electrical property ($D_f$), while High Tg refers to the thermal property. However, most high-speed resins (like PPO/PPE blends) naturally have higher Tg values.
2. Can I mix different laminates in one stackup?
Yes, this is called a Hybrid Stackup. You might use an expensive low-loss material for the outer signal layers and cheaper FR4 for the inner power/ground layers to save money.
3. How much does copper roughness actually matter?
At 1 GHz, not much. At 10 GHz, it can account for 30% of your total loss. At 25 GHz and above, it is often the dominant loss factor.
4. What is the “Resonance” I see in my loss plots?
This is usually caused by via stubs or periodic structures (like the glass weave). It’s a sign that the signal is reflecting back and forth, canceling itself out at specific frequencies.
5. Why is Isola Tachyon 100G so popular?
It combines very low $D_k$ and $D_f$ with thermal stability, making it a reliable “workhorse” for engineers designing high-end network switches and servers where SI is the top priority.
Inquire: Call 0086-755-23203480, or reach out via the form below/your sales contact to discuss our design, manufacturing, and assembly capabilities.
Quote: Email your PCB files to Sales@pcbsync.com (Preferred for large files) or submit online. We will contact you promptly. Please ensure your email is correct.
Notes: For PCB fabrication, we require PCB design file in Gerber RS-274X format (most preferred), *.PCB/DDB (Protel, inform your program version) format or *.BRD (Eagle) format. For PCB assembly, we require PCB design file in above mentioned format, drilling file and BOM. Click to download BOM template To avoid file missing, please include all files into one folder and compress it into .zip or .rar format.