Inquire: Call 0086-755-23203480, or reach out via the form below/your sales contact to discuss our design, manufacturing, and assembly capabilities.
Quote: Email your PCB files to Sales@pcbsync.com (Preferred for large files) or submit online. We will contact you promptly. Please ensure your email is correct.
Notes: For PCB fabrication, we require PCB design file in Gerber RS-274X format (most preferred), *.PCB/DDB (Protel, inform your program version) format or *.BRD (Eagle) format. For PCB assembly, we require PCB design file in above mentioned format, drilling file and BOM. Click to download BOM template To avoid file missing, please include all files into one folder and compress it into .zip or .rar format.
If you’ve spent any time working on complex SoC or ASIC designs, you’ve probably hit that frustrating moment when you realize you need post-silicon flexibility but don’t want the power overhead and board space of a discrete FPGA. That’s exactly where Menta eFPGA comes into play, and after diving deep into their technology stack, I can tell you it’s worth a serious look.
What Makes Menta eFPGA Different from Traditional Approaches
Menta has been in the embedded FPGA game since 2007, which makes them one of the longest-standing players in this space. What sets them apart is their 100% standard-cell based architecture. Unlike competitors who rely on full-custom designs that take months to port between process nodes, Menta’s approach lets you move your eFPGA IP to different foundries and technology nodes relatively quickly.
From a practical standpoint, this means you’re not locked into a single foundry or process. Working on a design for TSMC 28nm today but need to move to GlobalFoundries 22FDX next year? Menta’s architecture handles that transition without requiring a complete redesign. Their IP has been silicon-proven on technologies ranging from 350nm all the way down to advanced nodes like TSMC 12FFC, GlobalFoundries 12LP, and even Intel 18A.
The company is headquartered in Sophia-Antipolis, France, and has grown to over 30 employees with more than 20 successful tape-outs under their belt. They’ve worked with customers across defense, aerospace, automotive, AI, and telecommunications sectors.
Understanding Menta eFPGA Architecture and IP Options
When you’re evaluating Menta eFPGA for your project, you’ll encounter two main delivery formats: Soft IP (RTL) and Hard IP (GDSII). Each has its place depending on your design requirements and timeline.
Soft IP vs Hard IP Delivery
Feature
Soft IP (RTL)
Hard IP (GDSII)
Delivery Time
As little as 2 weeks
Several months
Foundry Flexibility
Any foundry/node
Fixed to specific process
Physical Implementation
Customer handles P&R
Pre-characterized macro
Customization
Maximum flexibility
Limited post-delivery
Integration Complexity
More effort required
Drop-in block
Best For
Rapid prototyping, multi-foundry
Production designs with fixed process
The soft IP approach is particularly attractive because it lets you integrate the eFPGA using your existing EDA flow and standard tools. You’re not introducing some exotic process that your CAD team hasn’t seen before.
Customizable Logic Resources
One thing I appreciate about Menta’s approach is that you don’t have to accept a one-size-fits-all FPGA fabric. You can specify exactly what you need:
Resource Type
Configuration Options
Embedded Logic Blocks (eLBs)
100 to 200,000+ LUTs
DSP Blocks
Adaptive DSP with configurable operand size
Memory Blocks
Customer-defined RAM configurations
Interconnects
Number and type configurable
Power Features
Multiple power-saving options
I/O Ports
Aspect ratio and port count flexible
The adaptive DSP solution deserves special mention. Unlike fixed DSP blocks in traditional FPGAs, Menta’s DSP architecture lets you configure the multiplier and ALU sizes through the bitstream. This is dynamically reconfigurable and controllable at the clock cycle level. Their FIR generator can support filters from 4 to 512 taps.
Origami Programmer: The Complete Design Tool Suite
Any eFPGA IP is only as good as its programming tools, and this is where Menta has invested significantly. Their Origami Programmer is a complete RTL-to-bitstream solution that handles synthesis, place and route, static timing analysis, and bitstream generation.
Key Origami Programmer Capabilities
The tool supports IEEE VHDL, Verilog, and SystemVerilog, so you’re not learning a new HDL. It uses the Verific parser for synthesis, which is the same engine you’ll find in many commercial EDA tools.
From a workflow perspective, here’s what you get:
Function
Description
Synthesis
IEEE HDL support with architecture optimization
Place & Route
Timing-driven with floor planning support
STA
SDC files support with critical path reports
Bitstream
Generation and loading simulation
Reporting
Resource usage, density statistics, setup/hold
Scripting
TCL scriptable for automation
The software runs on RedHat Linux and SUSE Linux. You can use it standalone or integrate it with your existing customer tool flow through APIs. This is important because you don’t want to disrupt your entire design methodology just to add an eFPGA block.
Menta can distribute the Origami Programmer to both SoC providers and their end customers, which simplifies the supply chain when you’re building products that need field updates.
Process Node Support and Foundry Compatibility
This is where Menta’s standard-cell based architecture really pays dividends. They’ve demonstrated silicon-proven results across an impressive range of technologies:
Foundry
Qualified/Proven Nodes
TSMC
28HPC+, 12FFC, N7 (in design)
GlobalFoundries
32 SOI, 22FDX, 14LPP, 12LP
STMicroelectronics
130nm, 65nm, 28FDSOI
Intel
Intel 16, Intel 18A (in design)
XFAB
180nm
Skywater
RH90 (radiation-hardened)
Menta is also a 22 FDXcelerator Partner with GlobalFoundries, which gives them early access to process design kits and support. For defense and aerospace applications, the radiation-hardened capability on processes like Skywater RH90 is a significant differentiator.
Menta eFPGA Applications Across Industries
When you look at where Menta eFPGA technology is being deployed, several key verticals stand out.
Aerospace and Defense
The mil-aero sector has embraced eFPGA technology for several reasons. First, you can update cryptographic algorithms in the field without pulling chips off boards. This hardware-accelerated crypto agility is essential when root of trust implementations need to evolve. Second, the ability to extend mission capabilities post-fabrication means systems can adapt to new threats or requirements. The radiation-hardened options make these designs space-qualified.
Automotive and Mobility
In automotive applications, the post-production customization capability allows manufacturers to update hardware for regulatory compliance, new features, or evolving standards. Given the long development cycles and even longer vehicle lifespans, this flexibility is valuable.
IoT and Edge Computing
For edge devices, Menta eFPGA enables adaptation to application requirements without redesigning silicon. The power efficiency gains from integrating FPGA functionality on-chip rather than using discrete FPGAs make these designs viable for power-constrained IoT applications.
AI and Data Center
eFPGA provides hardware acceleration for machine learning inference and data processing tasks. By embedding the FPGA fabric directly with DPUs, you eliminate the latency and power overhead of chip-to-chip communication.
The eFPGA market has several players, and understanding where Menta fits helps you make the right choice for your project.
eFPGA Vendor Comparison
Vendor
Architecture
Key Strength
Primary Focus
Menta
Standard-cell based
Process portability, soft IP
Broad node support
Achronix
Full-custom
High performance
Data center, 5G
QuickLogic
Semi-custom
Low power, open-source tools
IoT, mobile
Flex Logix
Proprietary interconnect
Density, AI inference
AI acceleration
Menta’s standard-cell approach means faster time to delivery and easier process migration, but you may see slightly different performance characteristics compared to full-custom implementations. The NSA’s Joint FPGA Architecture Consortium (JFAC) Hardware Assurance team actually evaluated all four major vendors (Achronix, Flex Logix, Menta, and QuickLogic) and their findings are publicly available for defense customers.
Discrete FPGA vs Menta eFPGA Trade-offs
Consideration
Discrete FPGA
Menta eFPGA
Power Consumption
Higher (I/O overhead)
10-50% of discrete FPGA
Board Space
Requires separate chip
Integrated on-die
BOM Cost
Additional component
Reduced at volume
Communication Latency
Chip-to-chip
Direct wire connection
Pin Count
Package limited
Hundreds of internal signals
Security
Exposed board traces
On-chip, no external exposure
Customization
Fixed architecture
Right-sized for application
Getting Started with Menta Technology
If you’re considering Menta eFPGA for your next design, there are several entry points depending on your needs.
Menta Starter Pack (MSP)
The MSP is designed to help you understand the technology before committing to a full license. It includes two days of training covering eFPGA architectures, implementation methodologies, simulation techniques, and testing strategies. After training, you get six weeks of access to Origami Programmer along with sample RTL designs for hands-on exploration.
Launch Pad Program
For defense and aerospace customers working under tight budgets, Menta’s Launch Pad program offers a low-cost entry point. You can fabricate test silicon with any size eFPGA from 100 to 10,000 LUTs on any current process node at up to 90% off standard licensing fees. If you move to production, the initial fee applies toward your production license.
Recent Partnership: Renesas ForgeFPGA
Menta recently licensed their fifth-generation eFPGA IP to Renesas for the ForgeFPGA product line. This demonstrates the technology’s maturity and commercial viability. The Origami Programmer tools are being integrated into Renesas’ GoConfigure software hub.
Useful Resources for Further Research
Here are the key resources you should explore when evaluating Menta eFPGA technology:
For direct inquiries, contact info@menta-efpga.com or reach out through their website contact form.
Security Considerations for eFPGA Integration
Security is increasingly important in semiconductor design, and Menta has partnered with Secure-IC to address this directly. Their joint solution provides:
The bitstream unique to each device provides security through obfuscation. Since the eFPGA configuration is programmed after SoC manufacturing, proprietary algorithms can be kept in-house until the last possible moment, reducing exposure throughout the supply chain.
Hardware-based security features including encryption, authentication, and secure boot capabilities can be implemented directly in the eFPGA fabric. This protects sensitive data and intellectual property from unauthorized access or tampering.
FAQs About Menta eFPGA Technology
What process nodes does Menta eFPGA support?
Menta eFPGA IP supports process nodes from 350nm down to 5nm and below. They have silicon-proven results on TSMC, GlobalFoundries, STMicroelectronics, Intel, XFAB, and Skywater processes. Current customer designs are in progress on Intel 18A and TSMC N7. The standard-cell based architecture enables rapid porting to new nodes as they become available.
How quickly can Menta deliver soft IP?
Menta can deliver soft IP as RTL in as little as 14 days for standard configurations. Hard IP (GDSII) takes longer due to physical implementation requirements. The rapid delivery of soft IP is a significant advantage for customers on tight schedules or those evaluating eFPGA for the first time.
What is the typical power savings compared to discrete FPGAs?
Algorithms running on Menta eFPGA IP typically consume between 10% and 50% of the power required by the same algorithm on a discrete FPGA. This savings comes from eliminating high-speed I/O interfaces, programmable I/O buffers, and the overhead of unused FPGA resources. The eFPGA is right-sized for your application rather than accepting whatever fixed configuration comes in a packaged FPGA.
Can Menta eFPGA IP be radiation-hardened?
Yes, Menta’s standard-cell based architecture can be radiation-hardened by design when implemented using rad-hard standard cell libraries. They have demonstrated this capability on processes like Skywater RH90 and have worked with partners like IMEC on rad-hard implementations for space applications.
What EDA tools are required to work with Menta eFPGA?
For soft IP integration, you use your existing EDA flow and standard tools. Menta supports industry-standard Synopsys-based implementation flows. The Origami Programmer handles the FPGA-specific synthesis, place and route, and bitstream generation. It supports IEEE VHDL, Verilog, and SystemVerilog, and can operate standalone or integrate via API with your existing methodology.
Final Thoughts on Menta eFPGA for Your Next Design
After looking at the technology in detail, Menta eFPGA represents a mature and well-supported option for designers who need post-silicon flexibility without the overhead of discrete FPGAs. The standard-cell based architecture provides genuine process portability that their competitors struggle to match.
For defense and aerospace applications, the radiation-hardening capability combined with the Launch Pad program makes evaluation accessible. For commercial applications, the Renesas partnership demonstrates that major semiconductor companies see value in this technology.
The key decision factors come down to your specific requirements: if you need maximum process flexibility and faster IP delivery, the soft IP approach is compelling. If you’re optimizing for absolute performance and have locked in your foundry choice, you might explore hard IP options or compare with full-custom alternatives.
Either way, Menta eFPGA deserves serious consideration in your eFPGA vendor evaluation. The 15+ years of development, 20+ tape-outs, and growing customer base across multiple industries indicate this is production-ready technology, not a research project.
Inquire: Call 0086-755-23203480, or reach out via the form below/your sales contact to discuss our design, manufacturing, and assembly capabilities.
Quote: Email your PCB files to Sales@pcbsync.com (Preferred for large files) or submit online. We will contact you promptly. Please ensure your email is correct.
Notes: For PCB fabrication, we require PCB design file in Gerber RS-274X format (most preferred), *.PCB/DDB (Protel, inform your program version) format or *.BRD (Eagle) format. For PCB assembly, we require PCB design file in above mentioned format, drilling file and BOM. Click to download BOM template To avoid file missing, please include all files into one folder and compress it into .zip or .rar format.