IPC-5702 Standard: OEM Guidelines for Bare Board Cleanliness Assessment

Every electronics manufacturer eventually faces the same frustrating question: “How clean is clean enough?” When it comes to bare PCB cleanliness, there’s no magic number that works for every application. A board destined for a disposable consumer gadget has very different cleanliness needs than one going into an implantable medical device or automotive safety system.

IPC-5702 was developed specifically to help OEMs and EMS companies work through this complexity and establish cleanliness criteria that actually make sense for their products. Rather than providing one-size-fits-all numbers, IPC-5702 gives you a framework for determining what “acceptable” means for your specific application.

What is IPC-5702?

IPC-5702 is officially titled “Guidelines for OEMs in Determining Acceptable Levels of Cleanliness of Unpopulated Printed Boards.” Released in June 2007 by the Association Connecting Electronics Industries (IPC), this standard provides guidance for professionals responsible for developing cleanliness criteria for incoming bare boards.

The standard acknowledges an important reality that many engineers have learned the hard way: there is no “golden number” for board cleanliness. The issue is complex, with many critical considerations, and a single methodology to determine acceptability simply does not exist.

Instead of prescribing specific contamination limits, IPC-5702 helps you correlate cleanliness-related data to electrical function and determine what cleanliness levels are truly acceptable for your products.

Who Needs IPC-5702?

This standard is essential for anyone responsible for establishing incoming bare board quality requirements. That includes:

Original Equipment Manufacturers (OEMs) who design products and need to specify cleanliness requirements to their PCB suppliers. If you’re the company whose name goes on the final product, you need to understand what cleanliness level protects your brand and your customers.

Electronics Manufacturing Services (EMS) Companies that receive bare boards from multiple fabricators and need consistent incoming quality standards. EMS providers often work across multiple industries and product types, making a risk-based approach to cleanliness essential.

Quality Engineers tasked with developing incoming inspection criteria and supplier qualification programs. IPC-5702 provides the framework for writing specifications that are both meaningful and testable.

Reliability Engineers who must predict product lifetime and understand how bare board contamination affects field performance. The connection between cleanliness and long-term reliability is central to this standard.

Procurement Professionals who write purchasing specifications and need to communicate cleanliness expectations clearly to suppliers.

Why There’s No Universal Cleanliness Standard

If you’ve searched for a simple answer to “what ionic contamination level should I specify?”, you’ve probably been frustrated. The reason a universal standard doesn’t exist comes down to the complex interplay of factors that determine whether contamination will cause problems.

Application-Specific Requirements

Consider the difference between these scenarios:

A fitness tracker worn occasionally during workouts operates at low voltage, has moderate conductor spacing, and has a two-year expected lifespan. Some residual contamination may be acceptable because the conditions for electrochemical migration rarely align.

An engine control unit in an automobile operates in an extremely harsh environment with temperature cycling from -40°C to +125°C, exposure to humidity and condensation, and a 15-year expected service life. The same contamination level that’s harmless in the fitness tracker could cause catastrophic failure here.

The Three Factors That Drive Failure

For ionic contamination to cause electrochemical migration and dendritic growth, three conditions must exist simultaneously:

1. Ionic contamination on the board surface
2. Moisture to dissolve and mobilize the ions
3. Voltage potential to drive ion migration

Remove any one of these factors, and the failure mechanism doesn’t occur. This is why the same contamination level can be perfectly safe in one application and dangerous in another. The operating environment determines whether moisture will be present. The circuit design determines voltage potentials. And the cleanliness level you specify determines how much ionic material is available to participate in degradation reactions.

The Risk-Based Perspective

IPC-5702 promotes thinking about cleanliness as a sliding scale of risk rather than a pass/fail threshold. The more contamination present on your assembly, the greater the risk for premature failure. Your job as an engineer is to determine how much risk is acceptable for your product and specify accordingly.

Key Factors Covered in IPC-5702

The standard guides you through evaluating several critical factors when establishing cleanliness criteria.

End-Use Environment Assessment

The operating environment is perhaps the most important factor in determining acceptable cleanliness levels. IPC-5702 helps you consider:

A product operating in a climate-controlled data center faces very different contamination risks than one mounted under an automobile hood or deployed on an offshore oil platform.

Design Service Life Considerations

How long must your product operate reliably? This factor dramatically affects acceptable cleanliness levels.

A contamination level that might cause failure at year 12 is irrelevant for a smartphone but unacceptable for an aircraft flight control system. IPC-5702 helps you match cleanliness requirements to actual service life expectations.

Technology and Design Factors

Modern PCB designs present greater contamination sensitivity than older designs:

Conductor Spacing: As trace-to-trace spacing decreases, the distance ions must travel to create a short decreases proportionally. A board with 0.1mm spacing is far more sensitive to contamination than one with 0.5mm spacing.

Operating Voltage: Higher voltages increase the driving force for electrochemical migration. Low-voltage digital circuits may tolerate contamination that would be problematic in high-voltage power sections.

Component Types: Some components create geometry that traps contamination and makes cleaning difficult. QFNs, BGAs, and other low-standoff packages present particular challenges.

Surface Finish: Different finishes have different contamination profiles. HASL processes involve flux that can leave residues, while ENIG typically produces cleaner boards.

How IPC-5702 Relates to Other Bare Board Cleanliness Standards

IPC-5702 is part of a family of documents developed by the IPC Bare Board Cleanliness Assessment Task Group. Understanding how these documents work together helps you build a comprehensive cleanliness program.

The IPC-5702 and IPC-5704 Connection

While IPC-5702 helps you determine what cleanliness level is appropriate for your application, IPC-5704 provides the actual numerical requirements and test methods. Think of the relationship this way:

• IPC-5702 answers: “What cleanliness level do I need?”
• IPC-5704 answers: “What are the specific limits and how do I test for them?”

IPC-5704 was released in 2010, three years after IPC-5702, and provides hard specifications including maximum limits for individual ionic species using ion chromatography testing. The cleanliness limits in IPC-5704 are based largely on work done by Delphi Automotive, which had years of experience correlating bare board cleanliness to field reliability in demanding automotive applications.

Working with IPC-5701

IPC-5701 complements IPC-5702 by providing guidance on how to document your cleanliness requirements in purchasing specifications. Once you’ve used IPC-5702 to determine appropriate cleanliness levels, IPC-5701 helps you communicate those requirements effectively to your PCB suppliers.

Read more IPC Standards:

IPC Standards Explained: A Comprehensive Guide to PCB & Electronics Assembly Standards

IPC 2615 Standard Explained: PCB Dimensioning & Tolerancing Requirements

MIL-STD-2000A: Military Soldering Standards for Electronic Assemblies

MIL-STD-1686: ESD Control Program Requirements for Military Electronics

IPC 1791 Standard: Everything You Need to Know About Trusted PCB Certification

MIL-STD-883: Complete Guide to Microelectronics Test Methods

J-STD-048 Explained: Complete Guide to Product Discontinuance Notifications

MIL-STD-750: Semiconductor Device Test Methods Explained

MIL-STD-454: General Requirements for Military Electronic Equipment

IPC 9194: Complete Guide to SPC for PCB Assembly Manufacturing

MIL-STD-202: Electronic Component Testing Methods & Procedures

IPC 4110: Complete Guide to Cellulose Paper Specs for Printed Circuit Boards

Boundary Scan Testing (JTAG) in PCB Design: A Complete DFT Guide

Axiomtek IPC-950 Review: Specs, Features & Performance [2026 Guide]

MIL-PRF-55681: Military Ceramic Chip Capacitor Specification Guide

Practical Implementation of IPC-5702 Guidelines

Step 1: Characterize Your Application

Before you can determine appropriate cleanliness levels, you need a thorough understanding of your product:

• What is the expected operating environment?
• What is the minimum conductor spacing on the board?
• What voltages are present in the circuit?
• What is the expected service life?
• What are the consequences of field failure?
• Will conformal coating or encapsulation be used?

Document these factors carefully. They form the foundation for all subsequent decisions.

Step 2: Assess Risk Tolerance

Different products have different acceptable failure rates. Consider:

• What is the cost of a field failure (warranty, reputation, safety)?
• What is the acceptable failure rate over product lifetime?
• Are there regulatory requirements that dictate reliability levels?

A children’s toy manufacturer might accept a 1% field failure rate. A medical device manufacturer might require 0.001% or better. These different risk tolerances translate directly to different cleanliness requirements.

Step 3: Establish Cleanliness Criteria

Based on your application assessment and risk tolerance, establish specific cleanliness limits. Options include:

Traditional ROSE Limits: The classic 1.56 µg/cm² NaCl equivalent limit is widely used but may be inadequate for demanding applications.

IPC-5704 Limits: More stringent limits based on ion chromatography testing, with individual limits for specific ionic species.

Custom Limits: For critical applications, you may need to develop application-specific limits based on reliability testing of your actual products.

Step 4: Define Testing Requirements

Specify how cleanliness will be verified:

• What test method will be used (ROSE, ion chromatography, etc.)?
• How many samples per lot?
• What locations on the board will be tested?
• What happens when limits are exceeded?

Step 5: Qualify Your Supply Base

Work with your PCB fabricators to ensure they can consistently meet your requirements. This may involve:

• Reviewing their process controls for contamination
• Auditing their cleaning and handling procedures
• Establishing ongoing monitoring and reporting requirements
• Qualifying alternative suppliers for supply chain resilience

Common Challenges When Applying IPC-5702

Challenge 1: Legacy Specifications

Many companies continue using specifications established decades ago without reassessing whether they’re appropriate for current products. The classic 1.56 µg/cm² limit was developed for technology and applications that may be very different from what you’re building today.

Solution: Use IPC-5702 to perform a fresh assessment of your actual cleanliness needs rather than blindly copying old specifications.

Challenge 2: One-Size-Fits-All Mentality

Applying the same cleanliness specification to all products regardless of their risk profile wastes money on over-specification for low-risk products while potentially under-specifying high-risk products.

Solution: Develop tiered cleanliness requirements based on product risk classification. IPC-5702 provides the framework for this approach.

Challenge 3: Testing Limitations

ROSE testing, while widely available, provides only a bulk contamination number averaged across the entire board surface. It cannot identify specific ionic species or locate contamination hot spots.

Solution: For high-reliability applications, consider ion chromatography testing per IPC-5704, which provides much more detailed and actionable information.

Challenge 4: Supply Chain Communication

Vague specifications like “boards shall be clean” lead to disputes and quality issues.

Solution: Use the guidance from IPC-5701 and IPC-5702 together to write clear, testable specifications that leave no room for interpretation.

Testing Methods Referenced in IPC-5702 Context

Understanding available testing methods helps you specify appropriate verification requirements.

ROSE Testing (Resistivity of Solvent Extract)

Ion Chromatography

Surface Insulation Resistance (SIR)

Where to Purchase IPC-5702

When purchasing IPC-5702, also consider obtaining the related documents (IPC-5701, IPC-5703, IPC-5704) to have the complete picture of bare board cleanliness requirements.

Frequently Asked Questions About IPC-5702

What is the main purpose of IPC-5702?

IPC-5702 provides guidance for OEMs and EMS companies to determine what cleanliness level is acceptable for their specific applications. Rather than providing universal pass/fail numbers, it helps you assess factors like end-use environment, service life, and technology requirements to establish appropriate cleanliness criteria for your products.

Does IPC-5702 provide specific contamination limits?

No. IPC-5702 is a guideline document that helps you determine what limits are appropriate for your application. For specific numerical limits, refer to IPC-5704, which provides pass/fail criteria based on ion chromatography testing. IPC-5702 and IPC-5704 are designed to work together.

How does IPC-5702 differ from IPC-5701?

IPC-5701 focuses on how to specify cleanliness requirements in purchasing documents, while IPC-5702 focuses on how to determine what cleanliness level you actually need. Use IPC-5702 first to establish appropriate requirements, then use IPC-5701 guidance to communicate those requirements to your suppliers.

Is the traditional 1.56 µg/cm² NaCl limit still valid?

The 1.56 µg/cm² limit remains widely used and may be adequate for many applications. However, IPC-5702 encourages you to assess whether this legacy limit is actually appropriate for your specific products. Modern high-density designs with fine conductor spacing may require tighter limits, while less demanding applications might tolerate higher contamination levels.

How often should we reassess our cleanliness requirements?

Reassess your cleanliness requirements whenever you introduce new products, change PCB designs (especially conductor spacing), enter new markets with different environmental conditions, or experience field failures potentially related to contamination. At minimum, review your cleanliness specifications annually as part of your quality management process.

Conclusion

IPC-5702 provides essential guidance for the challenging task of determining appropriate bare board cleanliness levels. By helping you assess end-use environment, service life, technology factors, and risk tolerance, the standard enables you to establish cleanliness criteria that are neither overly stringent (wasting money) nor dangerously lax (risking field failures).

The key insight from IPC-5702 is that cleanliness should be treated as a sliding scale of risk rather than a simple pass/fail threshold. Each assembly has its own tolerance for contamination based on its unique combination of design, environment, and reliability requirements. Your responsibility as an engineer is to understand these factors and specify accordingly.

Used in conjunction with IPC-5701 (for specification writing), IPC-5703 (for fabricator guidance), and IPC-5704 (for specific limits), IPC-5702 forms part of a comprehensive framework for managing bare board cleanliness throughout the supply chain. Investing time in understanding and applying this framework pays dividends in improved product reliability and reduced field failure costs.