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Contact & Quotation

  • Inquire: Call 0086-755-23203480, or reach out via the form below/your sales contact to discuss our design, manufacturing, and assembly capabilities.
  • Quote: Email your PCB files to Sales@pcbsync.com (Preferred for large files) or submit online. We will contact you promptly. Please ensure your email is correct.
Drag & Drop Files, Choose Files to Upload You can upload up to 3 files.

Notes:
For PCB fabrication, we require PCB design file in Gerber RS-274X format (most preferred), *.PCB/DDB (Protel, inform your program version) format or *.BRD (Eagle) format. For PCB assembly, we require PCB design file in above mentioned format, drilling file and BOM. Click to download BOM template To avoid file missing, please include all files into one folder and compress it into .zip or .rar format.

Decoupling Capacitor Selector - PCBsync

Decoupling Capacitor Selector

PCBsync Engineering Tools
PDN Design
Design Requirements
Application Type
Supply Voltage 3.3 V
Max Transient Current 500 mA
Ripple Tolerance 3%
Operating Frequency 100 MHz
Preferred Package
Select Capacitors (click to toggle)
Impedance Analysis
Target Impedance (Ztarget)
198mΩ
Z = Vripple / Itransient = (3.3V × 3%) / 500mA
Min Impedance
42 mΩ
Effective Range
1k-500M Hz
Total Caps
7
Impedance vs Frequency
Target
Combined
Individual
PDN impedance meets target across operating frequency range
Value Package ESR SRF Qty Role
Design Notes
Recommended decoupling for FPGA/SoC at 3.3V with 500mA transients. Multiple capacitor values provide low impedance across wide frequency range. Place smallest caps closest to power pins.

Decoupling Capacitor Design Guide

Decoupling capacitors are essential for maintaining stable power delivery to ICs by providing local charge storage and reducing power supply impedance. The goal is to keep PDN (Power Delivery Network) impedance below the target impedance across all frequencies where the IC draws current.

Ztarget = Vsupply × Ripple% / Itransient

Zcap(f) = √(ESR² + (2πfL - 1/(2πfC))²)

SRF = 1 / (2π√(LC)) — Self-Resonant Frequency

At the self-resonant frequency (SRF), the capacitor's impedance equals its ESR — the minimum possible impedance. Below SRF, the capacitor behaves capacitively; above SRF, it becomes inductive due to ESL. Using multiple capacitor values creates overlapping impedance curves for broadband low impedance.

Capacitor Value Roles
  • 10-100µF — Bulk, low-frequency (<100kHz)
  • 1-10µF — Mid-frequency (100kHz-10MHz)
  • 100nF — General decoupling (1-50MHz)
  • 10nF — High-frequency (10-100MHz)
  • 1nF-100pF — VHF/UHF (>100MHz)
Package Effects
  • Smaller packages = lower ESL = higher SRF
  • 0201: ~0.3nH ESL, best for >500MHz
  • 0402: ~0.5nH ESL, good to ~300MHz
  • 0603: ~0.7nH ESL, good to ~200MHz
  • 0805: ~1.0nH ESL, good to ~100MHz
Placement Guidelines
  • Smallest values closest to IC pins
  • Keep loop area minimal (via to plane)
  • Use multiple vias for low inductance
  • Bulk caps can be further from IC
  • Consider power pin locations
Common Mistakes
  • Too many identical value caps
  • Ignoring ESL (package inductance)
  • Placing caps too far from pins
  • Using long traces instead of vias
  • Not considering anti-resonance

Pro Tip: Anti-resonance peaks occur when parallel capacitors of different values interact. The impedance can spike above target at frequencies between their SRFs. Adding intermediate value capacitors or using capacitors with higher ESR can dampen these peaks. Always simulate your PDN for critical designs.

Contact Sales & After-Sales Service

Contact & Quotation

  • Inquire: Call 0086-755-23203480, or reach out via the form below/your sales contact to discuss our design, manufacturing, and assembly capabilities.

  • Quote: Email your PCB files to Sales@pcbsync.com (Preferred for large files) or submit online. We will contact you promptly. Please ensure your email is correct.

Drag & Drop Files, Choose Files to Upload You can upload up to 3 files.

Notes:
For PCB fabrication, we require PCB design file in Gerber RS-274X format (most preferred), *.PCB/DDB (Protel, inform your program version) format or *.BRD (Eagle) format. For PCB assembly, we require PCB design file in above mentioned format, drilling file and BOM. Click to download BOM template To avoid file missing, please include all files into one folder and compress it into .zip or .rar format.