DC Link Capacitors: Inverter & VFD Applications — Selection, Sizing & Design Guide

Ask any power electronics engineer which component is most likely to limit the lifetime of an inverter or VFD, and the answer is almost always the same: the DC link capacitor. Not the IGBTs, not the gate drivers, not the control board. The capacitor. I’ve torn apart failed motor drives that were well within their thermal and electrical ratings on every other component — but the DC bus electrolytic had a swollen top, elevated ESR, and had been slowly degrading for months before the unit finally shut down. Getting the DC link capacitor selection right isn’t just about meeting datasheet minimums — it directly determines whether your design survives 5 years or 20 in the field.

This guide covers what a DC link capacitor actually does at the circuit level, how to size it properly against ripple current and voltage requirements, why film capacitors have become the default choice for high-performance applications, and the layout rules that determine whether your design works as calculated or not.

What Is a DC Link Capacitor and What Does It Actually Do?

A DC link capacitor — also called a bus link capacitor or DC bus capacitor — is the energy storage and decoupling element placed on the DC rail between the rectifier/energy source and the inverter switching bridge. In a typical VFD or motor inverter, power flows left to right: AC mains → rectifier → DC link → inverter bridge → motor. The DC link capacitor sits at the middle node, performing three distinct functions simultaneously.

Bus stiffening and voltage stabilization. PWM switching draws current in fast, uneven bursts from the DC rail. Without a low-impedance capacitor to absorb these transients, the DC bus voltage sags and recovers with every switching event, and that ripple shows up directly in the motor phase currents and torque output. A well-sized DC link capacitor keeps the bus voltage flat enough that the inverter’s PWM control is working against a stable reference rather than a moving target.

High-frequency current bypass. As switching frequency increases, the impedance of the battery, rectifier, and connecting cables rises because of their parasitic inductance. The DC link capacitor, having much lower impedance at high frequency, becomes the natural return path for high-frequency ripple currents generated by the switching bridge. The DC link capacitor provides a low impedance path for high-frequency currents — as frequency goes up, battery and cable parasitic inductance cause impedance to increase, while capacitor impedance goes down, making it the preferable path for high-frequency AC to circulate.

Energy storage for dynamic transients. During rapid load changes — motor acceleration, regenerative deceleration, sudden load steps — the DC link capacitor supplies or absorbs the instantaneous energy difference between the rectifier input and the inverter output. This prevents bus overvoltage during regen and bus collapse during sudden load increases.

The DC Link Capacitor in a Three-Phase Inverter — Where the Ripple Comes From

Understanding ripple current generation is the foundation of correct capacitor sizing. In a three-phase voltage source inverter (VSI) using space vector modulation (SVM), the inverter switches generate current pulses from the DC bus at the PWM switching frequency. The DC link capacitor’s AC ripple current arises from two main contributors: the incoming current from the energy source and the current drawn by the inverter. Capacitors cannot pass DC current; thus, DC current only flows from the source to the inverter, bypassing the capacitor.

The ripple current magnitude depends on the load power factor (φ) and the modulation index (m). It peaks around 50% duty cycle and is worst at medium modulation indices. For a given RMS ripple component magnitude, low-frequency components cause more internal heating than high-frequency ones because ESR increases at lower frequencies for most electrolytic capacitors — this is the opposite of what intuition suggests and trips up many designers.

The result is that calculating the true RMS ripple current requires either closed-form analytical equations (derived by researchers including Johann Kolar at ETH Zurich for SVM-controlled VSIs), simulation, or careful measurement. The ripple current in the bus link capacitor is essentially the same as the ripple current in the phase leg, defined by the bus voltage, the load inductance, the duty cycle, and the PWM switching frequency. Ignoring the load power factor in this calculation typically leads to undersized capacitors that run hot and fail prematurely.

Sizing a DC Link Capacitor: The Two-Step Approach

When sizing a DC link capacitor for inverter applications, the ripple current requirement typically ends up being the limiting factor and drives which capacitor is selected. But you actually need to work through both constraints — ripple voltage first to establish minimum capacitance, then ripple current to establish the true sizing requirement.

Step 1 — Minimum Capacitance from Ripple Voltage

Designers typically specify a maximum allowable DC bus ripple voltage (ΔV) as a percentage of the bus voltage — commonly 5% to 10%. A looser specification reduces capacitance requirements; a tighter one increases them. From basic charge-transfer analysis of a three-phase bridge, the minimum capacitance for a given voltage ripple is:

C_min = I_load / (2 × f_sw × ΔV)

Where I_load is the peak inverter output current, f_sw is the PWM switching frequency, and ΔV is the allowed peak-to-peak voltage ripple. Higher switching frequency directly reduces the required capacitance — this is one reason why SiC and GaN converters can use dramatically smaller DC link capacitors than equivalent IGBT designs.

This is one of the reasons why SiC and GaN-based converters can achieve higher power densities than IGBT-based converters: switch faster → less capacitance required → volume decreases → higher kW/L and kW/kg.

Step 2 — Ripple Current Rating (The Actual Sizing Driver)

Once you have C_min, you calculate the RMS ripple current that the capacitor must handle. The simplified but conservative estimate for a three-phase VSI is:

I_C_RMS ≈ I_output_RMS × √(0.5 − (√3/4π) × m × cos(φ))

Where m is the modulation index (0 to 1) and φ is the load power factor angle. For a worst-case estimate, evaluate this at m = 0.6 and φ = 0 (zero power factor), which gives the highest capacitor ripple current. Then compare this figure to the rated RMS ripple current in the capacitor datasheet — at the actual operating temperature, not the datasheet’s reference temperature. It’s good practice to select a capacitor with a ripple current rating 1.1× or higher than your worst-case ripple current.

If the ripple current requirement exceeds a single capacitor’s rating, parallel multiple units. Paralleling reduces ESR proportionally and multiplies ripple current handling — this is the standard approach in high-power three-phase drives.

DC Link Capacitor Sizing Quick Reference Table

Inverter Power	Bus Voltage	Typical C Range	Typical Ripple Current	Preferred Technology
< 1 kW	400 VDC	100–470 µF	2–8 A RMS	Electrolytic or film
1–5 kW	400–600 VDC	470–2200 µF	8–25 A RMS	Electrolytic or film
5–20 kW	400–800 VDC	1000–5000 µF	25–80 A RMS	Film preferred
20–100 kW	400–800 VDC	2000–15000 µF	80–300 A RMS	Film (parallel banks)
EV traction (>100 kW)	400–800 VDC	500–2000 µF	200–600 A RMS	Film (flat wound, low ESL)

Note: Capacitance values are approximate starting points. Actual values depend on switching frequency, ripple voltage budget, and load power factor.

Film vs. Electrolytic DC Link Capacitors — The Real Trade-offs

This is where most of the interesting engineering decisions live. The choice between aluminium electrolytic and metallized polypropylene film capacitors for the DC link is not as straightforward as some application notes suggest — it depends on the specific performance requirements, environment, and total cost of ownership.

Aluminium Electrolytic Capacitors

Electrolytics dominated DC link designs for decades because of their unmatched capacitance density and low unit cost. The greatest benefit in using electrolytic capacitors for bus link capacitors in inverters has been their cost. They remain a valid choice for cost-sensitive, low-temperature, moderate-ripple-current applications where a 5–10 year design life is acceptable.

The fundamental problem is thermal sensitivity. The electrolyte — the liquid or gel that forms the cathode — evaporates slowly over time, and this process accelerates exponentially with temperature. End of life for an electrolytic is typically defined as the point where capacitance drops below 80% of initial value or ESR rises above twice the initial specified limit. At 85°C operating temperature, a typical electrolytic may be rated for 2,000 hours. At 65°C, that extends to 8,000 hours. The working lifetime rating of electrolytics is around 10k hours, whereas for film it’s 100k hours — because the electrolyte dries out and leads to increased ESR, which increases power loss and ultimately results in failure.

At 470/480 µF 450V, the film type ESR is about sixty times lower, the ripple current capability about nine times higher, and the life about four times longer at similar temperatures and frequencies. However, the electrolytic is ten times smaller and about one tenth of the cost.

Electrolytics are also voltage-limited — electrolytics are only available up to about 600 VDC rating compared with several kV for film types, requiring series connection of electrolytics with balancing networks in high voltage applications. For 800V automotive or industrial bus voltages, series-connected electrolytics with resistor balancing networks are required, which adds complexity and cost that erodes the initial price advantage.

Metallized Polypropylene Film Capacitors

Film capacitors use a thin polypropylene dielectric coated with a metal electrode layer — no liquid electrolyte means no evaporation, no aging drift, and no temperature-induced lifetime compression. Unlike electrolytic capacitors, which rely on an electrolyte that can dry out over time, film capacitors use a thin plastic film as the dielectric, offering thermal stability, insulation strength, and self-healing properties. The metallized construction enables a self-healing property which greatly extends lifetime — when localized dielectric breakdown occurs, the evaporated metal isolates the fault zone, preventing catastrophic failure.

The self-healing mechanism means that a film capacitor’s failure mode is gradual capacitance loss rather than sudden short-circuit failure, which is a significantly safer outcome in high-voltage applications. This also explains why film capacitors maintain their rated performance specifications consistently over their operating life rather than drifting.

Many high performance inverters such as electric vehicles, aircraft, and alternative energy systems are now turning to film capacitors because they do not have the limitations of electrolytic capacitors.

The penalty is physical size and cost per µF. A film capacitor achieving equivalent capacitance and voltage rating will typically be 5–10× larger than an electrolytic — but the comparison changes substantially when you include parallel electrolytic units needed to meet ripple current requirements.

Electrolytic vs. Film Head-to-Head Comparison

Parameter	Aluminium Electrolytic	Metallized PP Film
Capacitance density	High	Low–Medium
Cost per µF	Low	High
ESR	High (temperature-dependent)	Very Low
ESL	Medium	Low (flat-wound: very low)
Ripple current rating	Low	High
Max voltage (single unit)	~600 VDC	1–10 kV+
Typical design lifetime	5,000–15,000 hours	100,000+ hours
Self-healing	No	Yes
Temperature sensitivity	Very High	Low
Failure mode	Short or open circuit	Gradual capacitance loss
Best application	Cost-sensitive, moderate duty	High reliability, high ripple, harsh environments

What About Ceramic DC Link Capacitors?

Ceramic DC link capacitors such as TDK EPCOS’s CeraLink range are only available currently up to capacitances of about 20 µF at 500 V — if 23 were paralleled to achieve a comparable 460 µF, they would be a compromise. Ceramics have genuinely impressive ESL performance — flat ceramic packages can achieve sub-nanohenry inductance — but achieving useful capacitance values requires extensive paralleling, which defeats much of the cost and size advantage. Their role in DC link applications is primarily as close-coupled decoupling capacitors (a few µF) placed directly across switching device pins to handle the very fastest transients, working alongside the main bulk DC link capacitor.

Key Electrical Parameters to Specify

When writing a capacitor specification or reviewing a datasheet for DC link use, these are the parameters that matter — in approximately this order of importance:

Ripple current rating (I_RMS): Specified at a reference temperature (commonly 70°C or 85°C) and a reference frequency. Always derate for your actual operating temperature, and verify the frequency correction factor if your switching frequency differs significantly from the datasheet test frequency. This is the parameter most likely to drive your actual capacitor selection.

ESR (Equivalent Series Resistance): Directly determines I²R heating inside the capacitor from ripple current. Lower ESR means lower internal temperature rise for a given ripple current. ESR is frequency and temperature dependent — check the datasheet curve, not just the single-number specification.

ESL (Equivalent Series Inductance): Limits the capacitor’s effectiveness at high frequencies. Even a few nanohenries of stray inductance in the capacitor current path raises the impedance at the switching frequency to levels that negate their effectiveness. For SiC and GaN designs switching above 50 kHz, ESL of the capacitor and its mounting geometry becomes a primary design constraint. The capacitor you select should have a self-resonant frequency at least 2× higher than your switching frequency — so if you switch at 100 kHz, you should have at least 200 kHz rated caps.

Voltage rating and derating: Derate to 80–90% of rated voltage in continuous operation. For applications with regenerative braking or grid-tied energy flow, verify the maximum transient bus voltage under worst-case conditions — regen overvoltage spikes can briefly push the bus well above nominal.

Operating temperature range: The capacitor must be rated for the maximum ambient temperature it will experience inside the enclosure, including worst-case heat from adjacent power components. The DC-link capacitor in automotive inverter designs must be cooled and mounted on a heatsink — at best, the cooling fluid of a liquid-cooled heatsink should pass the capacitor first before cooling the hot semiconductor switches, respecting temperature limits.

Capacitance tolerance: ±10% or ±20% is typical for film and electrolytic types respectively. Wide tolerance affects ripple voltage performance at minimum capacitance — size for the worst case (minimum capacitance end of tolerance).

DC Link Capacitor Applications by Industry

The same fundamental requirements appear across applications, but the priorities shift:

Application	Bus Voltage	Primary Priority	Preferred Technology
Variable Frequency Drives (VFD)	400–690 VAC rectified (~565–975 VDC)	Cost, lifetime, reliability	Electrolytic (lower kW), Film (higher kW)
EV Traction Inverter	400–800 VDC	Ripple current, lifetime, size/weight	Flat-wound film, very low ESL
Solar PV Inverter	300–1000 VDC	Lifetime (25-year field life), high ripple	Film
Wind Turbine Converter	600–1200 VDC	High voltage, high current, reliability	Film (high voltage rated)
UPS / Industrial Inverter	400–800 VDC	Hold-up time, reliability	Electrolytic (hold-up), Film (ripple)
Onboard EV Charger	400–800 VDC	Power density, lifetime	Film
Industrial Robot Servo Drive	400–600 VDC	Dynamic response, reliability	Film

VFD-Specific Considerations

In a variable frequency drive, the DC link capacitor must handle ripple current contributions from both the rectifier input stage (at 6× mains frequency for three-phase diode bridge) and the inverter output stage (at switching frequency). The ripple current waveform is very difficult to predict as it is a combination of line frequency and input and output stage frequencies and their harmonics, with wave shapes depending on the topologies of the stages.

VFDs with active front-end (AFE) rectifiers present a more complex ripple spectrum but generally lower peak currents than passive diode bridge designs. Drives with regenerative capability must also be sized for regenerative braking events where motor energy is returned to the DC bus — this creates transient bus overvoltage that the capacitor must tolerate.

PCB and Busbar Layout Rules for DC Link Capacitors

The physics of how the DC link capacitor functions is fundamentally about impedance — specifically, minimizing the impedance of the loop formed by the capacitor, the DC bus rails, and the switching devices. Every nanohenry of parasitic inductance in this loop is counterproductive.

Minimize the DC link current loop area. The loop formed by the positive bus rail, the capacitor, the negative bus rail, and the switching device should be as physically small as possible. In laminated busbar designs, the positive and negative conductors are separated by a thin dielectric layer and run parallel — the opposing currents cancel most of the magnetic flux, achieving extremely low inductance.

Mount the capacitor as close to the switching devices as possible. The vicinity of the capacitor to the power module is one essential target to minimize stray inductance between the power stage and the capacitor itself — applying an overlapping busbar concept keeps the ESL as low as possible.

Use multiple parallel capacitors for high-power designs. Parallel connection reduces ESR and ESL proportionally and distributes thermal stress. Distribute the capacitors symmetrically around the switching devices rather than clustering them at one end of the bus.

Consider flat-wound or bus bar-mounted film capacitors for SiC/GaN designs. These package styles are specifically designed for low-inductance integration with laminated bus bars, achieving ESL values below 10 nH in the complete current loop.

Avoid long, narrow PCB traces on the DC bus. Wide, short bus planes dramatically outperform narrow traces. For a 10 cm × 5 mm PCB trace at 35 µm copper, the parasitic inductance is approximately 100 nH — enough to generate significant voltage overshoot at fast SiC switching transitions.

Lifetime Estimation and Failure Mode Management

For electrolytic capacitors, the Arrhenius-based lifetime model is the standard engineering approach. The simplified form is:

L_op = L_rated × 2^((T_rated − T_op)/10)

Where L_rated is the rated lifetime at T_rated (e.g., 2,000 hours at 105°C), and T_op is the actual hotspot temperature. This means every 10°C reduction in operating temperature doubles the expected lifetime — the single most powerful design action available for extending electrolytic capacitor life is thermal management.

Among the components in photovoltaic inverters, the DC bus capacitors are the most sensitive to operating conditions, making them the most likely to fail — with exclusively electrolytic capacitors exhibiting lifetimes of approximately 25, 8, and 6 years depending on derating, while exclusively film capacitor banks revealed lifetimes of approximately 23 to 42 years, where the dominant factor was maximum relative humidity tolerated by each capacitor.

For film capacitors, lifetime is primarily governed by voltage stress, temperature, and humidity — not the electrolyte-evaporation mechanism. Predicting remaining lifetime may be achieved using a Weibull statistical law combined with acceleration factors for temperature, voltage, and humidity. The practical implication is that film capacitors in a well-ventilated, controlled-humidity environment with adequate voltage derating can genuinely achieve 20+ year field lifetimes — making them the only realistic choice for designs where the application demands long service intervals without capacitor replacement.

Useful Resources for DC Link Capacitor Design

Resource	Description	Link
Cornell Dubilier — Selecting DC Link Bus Capacitors	Comprehensive technical paper covering ripple current, ESR heating, and inverter topology analysis by Sam Parler	cde.com
Specter Engineering — DC Link Capacitor Selection for Inverters	Practical engineering blog with closed-form ripple current equations for SVM-controlled three-phase VSI	specterengineering.com
Power Electronic Tips — Selecting DC Link Capacitors for Inverters	Per-unit analysis of rectifier and inverter ripple current contributions with worked examples	powerelectronictips.com
EEPower — Simplified DC Link Capacitor Calculation for xEV	Automotive-focused guide covering 400V and 800V xEV powertrain inverter capacitor sizing	eepower.com
ECI Capacitors — Film Bus Link Capacitors for Inverter Applications	Technical paper showing film capacitor advantages over electrolytic with design equations	ecicaps.com
Avnet Abacus — Selecting DC Link Capacitors in Power Converters	Technology comparison with cost, ESR, lifetime, and temperature sensitivity analysis	avnet.com
IEEE Xplore — Sizing DC-Link Capacitor for Automotive Inverter	Peer-reviewed analytical method considering voltage and current ripple with thermal validation	ieeexplore.ieee.org
ResearchGate — Reliability of Capacitors for DC-Link Applications	Overview paper comparing electrolytic, film, and ceramic capacitor reliability in power converters	researchgate.net
Eaton — DC Link and Safety Film Capacitors Application Note	Application note covering DC link film capacitor selection and comparison with safety capacitors	mouser.com/eaton

5 FAQs About DC Link Capacitors

Q1: Why does my VFD’s DC link capacitor get hot even when the motor is lightly loaded?

The ripple current — and therefore the I²R heating in the capacitor’s ESR — doesn’t scale linearly with motor load in the way you might expect. Ripple current is a function of modulation index (m) and load power factor (φ), and for many operating points at partial load with low motor power factor, the capacitor ripple current can be nearly as high as at full load. Also check whether the capacitor is mounted close to heat-generating components like IGBTs or brake resistors — thermal environment matters as much as electrical loading.

Q2: Can I use multiple smaller electrolytic capacitors in parallel instead of one large film capacitor?

Yes — and this is actually common practice in industrial drives. Paralleling electrolytics divides the ripple current among units (each sees a fraction of the total RMS) and reduces the effective ESR. The downside is that the voltage balancing issue disappears (all units see the same voltage), but you need to ensure current sharing is even, which it typically is in a well-designed bus structure. The honest comparison though is total cost including board space, mounting hardware, and expected replacement interval. Once you factor in that electrolytic banks in harsh environments may need replacement every 5–7 years while a film solution runs 20+ years, the economics often favor film for anything above 5 kW.

Q3: How do I know if my DC link capacitor is undersized?

The most reliable field indicator is elevated capacitor surface temperature. An operating temperature more than 10–15°C above ambient (without a clearly separate heat source nearby) suggests the capacitor is absorbing more ripple current than its thermal design handles comfortably. On the bench, scope the DC bus voltage with the inverter under full load and measure peak-to-peak ripple — if it exceeds your 5–10% budget, capacitance is inadequate. For electrolytics, also measure ESR periodically using an LCR meter: a value more than 1.5–2× the initial specification is a strong indicator that the capacitor has aged significantly and replacement should be planned.

Q4: Do I need to discharge the DC link capacitor before working on the drive?

Yes — this is a genuine safety requirement, not just a formality. DC link capacitors in industrial drives and EV systems store significant energy at high voltage. Even after the AC input is removed, the capacitor can maintain bus voltage at dangerous levels for seconds to minutes depending on the discharge resistor (bleeding resistor) designed into the circuit. Most drives include an active discharge circuit, but you should always verify with a meter before touching the DC bus. For EV traction systems at 400–800V, treat the capacitor with the same respect as the HV battery itself.

Q5: Why are film capacitors preferred in EV inverters and solar inverters even though they’re larger and more expensive?

Three reasons dominate the decision in these applications: lifetime, ripple current, and voltage. EV inverters are expected to handle 150,000+ km or 15+ years of operation without component replacement. Solar inverters have 20–25 year design lifetimes aligned with the panels they support. Electrolytics cannot realistically meet these lifetimes under the thermal and ripple conditions of these applications without scheduled replacement. On ripple current: the biggest design limitation for electrolytic capacitors in inverter applications has been the amount of ripple current they can sustain — a 5,000 µF / 450 V electrolytic typically sustains only 28 A RMS for a given package size, requiring parallel units to meet typical EV-grade requirements. Film capacitors, with their order-of-magnitude higher ripple current density, achieve the same capability in fewer units with better volumetric efficiency at the system level.