The XCKU035-2FFVA1156E is a high-performance Xilinx FPGA from the Kintex® UltraScale™ family, manufactured by AMD (formerly Xilinx). Designed for demanding mid-range applications, this device delivers an exceptional balance of signal processing power, I/O flexibility, and energy efficiency — all built on AMD’s proven 20nm UltraScale architecture.
Whether you are designing for 100G networking, medical imaging, wireless infrastructure, or high-speed data acquisition, the XCKU035-2FFVA1156E offers the logic density, DSP bandwidth, and transceiver performance to meet your requirements.
XCKU035-2FFVA1156E: Key Specifications at a Glance
| Parameter |
Value |
| Part Number |
XCKU035-2FFVA1156E |
| Manufacturer |
AMD (Xilinx) |
| FPGA Family |
Kintex® UltraScale™ |
| Technology Node |
20nm |
| Package |
1156-BBGA / FCBGA (FFVA1156) |
| Package Size |
35mm × 35mm |
| Speed Grade |
-2 (Commercial) |
| Temperature Grade |
E (Extended: 0°C to 100°C TJ) |
| RoHS Compliant |
Yes |
| Mounting Type |
Surface Mount |
| Operating Temperature |
0°C ~ 85°C (TJ) |
XCKU035-2FFVA1156E Logic and Memory Resources
The XCKU035-2FFVA1156E provides substantial programmable logic and on-chip memory resources suited to complex, high-throughput designs.
| Resource |
Quantity |
| Logic Cells (CLBs) |
203,128 |
| Macrocells / Logic Elements |
444,343 |
| Number of LABs / CLBs |
25,391 |
| Total RAM Bits |
19,456,000 bits (19,456 Kbit) |
| Max Block RAM |
~19.5 Mb |
| DSP Slices |
High-density DSP48E2 blocks |
| Clock Management |
MMCM, PLL |
XCKU035-2FFVA1156E I/O and Transceiver Specifications
I/O Capabilities
| Parameter |
Value |
| Total User I/Os |
520 |
| I/O Supply Voltage |
3.3V |
| HP I/O Voltage Range |
1.0V – 1.8V (High-Performance) |
| HR I/O Voltage Range |
1.2V – 3.3V (High-Range) |
| Number of Pins (Package) |
1156 |
Transceiver Performance
| Parameter |
Value |
| GTY Transceiver Line Rate |
Up to 16.3 Gb/s (FFVA1156 package) |
| GTH Transceiver Line Rate |
Up to 12.5 Gb/s (SF/FB packages) |
| Max Operating Frequency |
725 MHz |
| Supported Protocols |
PCIe, 100G Ethernet, CPRI, JESD204B |
Power Supply Requirements for XCKU035-2FFVA1156E
Proper power rail sequencing is critical for reliable FPGA operation. The table below summarizes the core and I/O supply voltage requirements.
| Supply Rail |
Minimum |
Maximum |
| Core Supply Voltage (VCCINT) |
0.922 V |
0.979 V |
| I/O Supply Voltage (VCCO) |
1.0V |
3.3V (I/O bank dependent) |
| Auxiliary Supply (VCCAUX) |
1.8V |
1.8V (typical) |
About the Kintex UltraScale FPGA Architecture
What Is the UltraScale Architecture?
The AMD UltraScale™ architecture introduces ASIC-like clocking, routing, and logic structures into FPGAs, enabling higher operating frequencies and lower dynamic power consumption compared to previous generations. The XCKU035-2FFVA1156E implements this architecture at the 20nm process node, achieving up to 40% lower power consumption versus prior-generation Kintex devices.
Key architectural innovations in the XCKU035-2FFVA1156E include:
- Fine-granular clock gating — reduces dynamic power at the sub-block level
- UltraRAM (URAM) — high-density embedded memory to lower BOM cost (available in UltraScale+ devices; this device uses high-density Block RAM)
- Next-generation DSP48E2 slices — optimized for signal processing pipelines
- Stacked Silicon Interconnect (SSI) technology — enables high-capacity, high-bandwidth device integration
XCKU035-2FFVA1156E Part Number Decoder
Understanding the part number helps confirm device configuration at a glance:
| Code Segment |
Meaning |
| XC |
Xilinx (AMD) product |
| KU |
Kintex UltraScale family |
| 035 |
Device size / logic density tier |
| -2 |
Speed grade (-2 = standard commercial performance) |
| FF |
Flip-Chip Fine-pitch Ball Grid Array (FCBGA) package |
| VA |
Package variant |
| 1156 |
Number of ball/pin positions |
| E |
Temperature grade (Extended, 0°C to 100°C TJ) |
Target Applications for XCKU035-2FFVA1156E
The XCKU035-2FFVA1156E is engineered for a wide range of high-performance applications where the right combination of logic density, DSP throughput, and multi-gigabit serial connectivity is essential.
Networking and Data Centers
- 100G Ethernet MAC and packet processing
- Network Function Virtualization (NFV) acceleration
- Line-rate deep packet inspection (DPI)
- High-frequency trading (HFT) infrastructure
Wireless and Telecom Infrastructure
- Remote Radio Head (RRH) Digital Front End (DFE)
- 8×8 MIMO 100 MHz TD-LTE radio units
- CPRI/eCPRI fronthaul processing
- Heterogeneous wireless infrastructure (HetNet)
Medical Imaging and Diagnostics
- Next-generation MRI and CT imaging pipelines
- Ultrasound signal processing
- High-resolution image reconstruction
Video and Broadcasting
- 8K/4K video processing and compression
- Real-time video codec acceleration
- SDI and HDMI interface bridging
Defense and Aerospace
- Radar and signal intelligence (SIGINT) processing
- Software-defined radio (SDR) platforms
- Secure communications and encryption
Industrial and Scientific Instrumentation
- High-speed data acquisition systems
- Motor control and industrial automation
- Scientific computing and simulation
XCKU035-2FFVA1156E vs. Similar Kintex UltraScale Devices
When selecting the right Kintex UltraScale device, understanding the differences between adjacent models helps ensure an optimized design.
| Device |
Logic Cells |
I/O Count |
Package Options |
Speed Grade |
| XCKU025-2FFVA1156E |
318,150 |
312 |
FCBGA-1156 |
-2 |
| XCKU035-2FFVA1156E |
444,343 |
520 |
FCBGA-1156 |
-2 |
| XCKU040-2FFVA1156E |
~530,000+ |
520 |
FCBGA-1156 |
-2 |
| XCKU060-2FFVA1156E |
~726,000+ |
520 |
FCBGA-1156 |
-2 |
The XCKU035-2FFVA1156E is the ideal choice for mid-range designs that require more I/O flexibility and logic density than the KU025, without the increased cost and power of the KU040 or above.
Development and Design Tools for XCKU035-2FFVA1156E
Vivado Design Suite
AMD’s Vivado Design Suite is the primary development environment for all Kintex UltraScale FPGAs. It provides a complete flow including:
- HDL design entry (VHDL, Verilog, SystemVerilog)
- Logic synthesis and implementation
- Place-and-route with timing closure tools
- Bitstream generation and programming
Vivado’s IP Integrator and Tcl scripting capabilities significantly accelerate XCKU035-2FFVA1156E design development.
Supported Evaluation Kits
The KCU105 Evaluation Kit features a Kintex UltraScale KU040 device in the same FFVA1156 package footprint, making it an excellent platform for prototyping designs targeted at the XCKU035-2FFVA1156E.
Ordering Information and Availability
| Parameter |
Detail |
| Part Number |
XCKU035-2FFVA1156E |
| Manufacturer |
AMD / Xilinx |
| Package |
1156-BBGA, FCBGA (35×35mm) |
| Speed Grade |
-2 |
| Temperature Grade |
Extended (E) |
| RoHS Status |
Compliant |
| Lead-Free |
Yes |
| Part Status |
Active |
Frequently Asked Questions About XCKU035-2FFVA1156E
What does the “-2” speed grade mean on the XCKU035-2FFVA1156E?
The -2 speed grade denotes the standard commercial performance tier within the Kintex UltraScale family. Speed grades range from -1 (slower, lower power) to -3 (fastest performance). The -2 grade offers strong performance at a cost-effective price point suitable for most 100G networking and DSP applications.
Is the XCKU035-2FFVA1156E pin-compatible with other Kintex UltraScale devices?
Yes. Devices in the same FFVA1156 package — including the XCKU025, XCKU035, and XCKU040 — are designed for package migration compatibility. This enables designers to target a smaller, lower-cost device during initial prototyping and migrate to a larger device if additional resources are required, without PCB redesign.
What transceiver line rates does the XCKU035-2FFVA1156E support?
In the FFVA1156 package, the XCKU035-2FFVA1156E supports GTY transceivers at up to 16.3 Gb/s, making it well-suited for 100G Ethernet, PCIe Gen3, and JESD204B applications.
What is the core voltage for the XCKU035-2FFVA1156E?
The device requires a core supply voltage (VCCINT) between 0.922V and 0.979V. A nominal value of 0.95V is typically used in design.
What temperature grade does the “E” suffix indicate?
The “E” suffix indicates the Extended temperature grade, specifying operation from 0°C to 100°C junction temperature (TJ). This makes it suitable for industrial and commercial equipment that operates across wider ambient temperature ranges.
