The XCKU060-1FFVA1156C is a high-performance Field Programmable Gate Array (FPGA) from AMD Xilinx, belonging to the Kintex® UltraScale™ family. Built on advanced 20nm process technology, it delivers an outstanding blend of price, performance, and power efficiency — making it one of the most sought-after mid-range FPGAs available today. Whether you are designing for 100G networking, data centers, medical imaging, or wireless infrastructure, the XCKU060-1FFVA1156C is engineered to meet demanding application requirements.
For engineers and procurement teams looking for compatible Xilinx FPGA solutions, this guide provides everything you need to evaluate and specify the XCKU060-1FFVA1156C with confidence.
What Is the XCKU060-1FFVA1156C?
The XCKU060-1FFVA1156C is a member of the Kintex UltraScale FPGA family from AMD (formerly Xilinx). It uses the first ASIC-class All Programmable Architecture capable of enabling multi-hundred Gbps system performance while efficiently routing and processing data on-chip. The device targets applications that demand high signal processing bandwidth at a competitive price point — a defining characteristic of the Kintex UltraScale product line.
The part number breaks down as follows:
| Segment |
Meaning |
| XC |
Xilinx Commercial |
| KU |
Kintex UltraScale Family |
| 060 |
Device Size (060 logic density) |
| -1 |
Speed Grade (-1, slowest/most power-efficient) |
| FFVA |
Package Type (Flip-Chip Fine-pitch Ball Grid Array) |
| 1156 |
Pin Count (1156 balls) |
| C |
Temperature Grade (Commercial: 0°C to 85°C) |
XCKU060-1FFVA1156C Key Specifications
The table below summarizes the core electrical and physical specifications of the XCKU060-1FFVA1156C.
General Device Specifications
| Parameter |
Value |
| Manufacturer |
AMD (Xilinx) |
| Part Number |
XCKU060-1FFVA1156C |
| FPGA Family |
Kintex® UltraScale™ |
| Process Technology |
20nm |
| Speed Grade |
-1 (Commercial) |
| Operating Temperature |
0°C to 85°C |
| Core Voltage (VCCINT) |
0.922V – 0.979V (typ. 0.95V) |
| RoHS Compliant |
Yes |
Logic and Memory Resources
| Resource |
Quantity |
| System Logic Cells |
725,550 |
| CLB Logic Cells |
331,680 |
| CLB Flip-Flops |
663,360 |
| Block RAM (Total Bits) |
38,000 Kb (38,912,000 bits) |
| UltraRAM (URAM) |
Not available (UltraScale only) |
| DSP Slices |
2,760 |
| DSP Performance |
Up to 8.2 TeraMACs |
I/O and Packaging
| Parameter |
Value |
| Package |
1156-BBGA / FCBGA (Flip-Chip BGA) |
| Total I/O Pins |
520 user I/Os |
| Total Pin Count |
1156 pins |
| Maximum Clock Frequency |
630 MHz |
| MMCM (Mixed-Mode Clock Managers) |
Yes |
| PLL |
Yes |
Transceiver Capabilities
| Feature |
Specification |
| Transceiver Type |
GTH (16.3 Gbps) |
| Backplane Speed |
16G capable |
| Max Aggregate Bandwidth |
Multi-hundred Gbps |
| PCIe® Support |
Gen3 (integrated hard IP) |
| DDR4 Memory Interface |
Up to 2400 Mb/s |
XCKU060-1FFVA1156C: Architecture Overview
UltraScale Architecture — First ASIC-Class FPGA Architecture
The XCKU060-1FFVA1156C is built on AMD Xilinx’s UltraScale™ architecture, which was the first ASIC-class, All Programmable architecture in the industry. This means the device uses ASIC-like routing methodology and clocking topology, which dramatically reduces routing congestion and achieves up to 2 speed grade improvements at high utilization compared to prior-generation FPGAs.
Key architectural innovations include:
- Next-generation routing — reduces congestion for high-utilization designs
- ASIC-like clocking — fine-grained clock gating for lower dynamic power
- 3D-on-3D IC technology — enables multi-chip integration for DSP-intensive applications
- Stacked Silicon Interconnect (SSI) technology — support for large monolithic and stacked configurations
- Multi-processor SoC technologies — for system-level integration
DSP and Signal Processing Performance
The XCKU060-1FFVA1156C contains 2,760 DSP48E2 slices, delivering up to 8.2 TeraMACs of compute performance. This is ideal for applications including radar signal processing, high-speed FFT engines, video encoding pipelines, and software-defined radio (SDR). The DSP slices support 27×18-bit multiplications, pre-adder stages, and cascading for building wide arithmetic paths without consuming general logic resources.
High-Speed Transceiver Fabric
The device integrates GTH transceivers capable of line rates up to 16.3 Gbps, supporting 16G backplane applications. Multiple integrated PCIe Gen3 cores are included as hard IP, reducing logic utilization and improving timing closure. This makes the XCKU060-1FFVA1156C a strong candidate for PCIe-based data acquisition cards, storage controllers, and network interface cards (NICs).
Applications of the XCKU060-1FFVA1156C
The XCKU060-1FFVA1156C is designed for a wide range of high-performance and bandwidth-intensive applications.
Networking and Data Center
| Application |
Why XCKU060-1FFVA1156C? |
| 100G Packet Processing |
High-speed GTH transceivers + large logic fabric |
| Network Interface Cards (NIC) |
Integrated PCIe Gen3 + DDR4 interface |
| Data Center Acceleration |
ASIC-class performance with FPGA flexibility |
| SmartNIC / DPU offloading |
Programmable data plane logic + high I/O count |
Defense and Aerospace
The XCKU060-1FFVA1156C is widely used in defense electronics due to its high logic density, DSP throughput, and support for encrypted configuration. Applications include radar signal processing, electronic warfare (EW) systems, and secure communications hardware.
Medical Imaging and Diagnostics
The device’s DSP performance makes it well-suited for medical imaging pipelines such as CT scanners, MRI post-processing, and ultrasound beam-forming — where 8.2 TeraMACs of floating-point-equivalent throughput enables real-time processing of high-resolution image data.
Video and Broadcast
The XCKU060-1FFVA1156C can drive 8K/4K video processing pipelines, HEVC/H.265 encoding, and broadcast routing systems. The combination of large block RAM, DSP slices, and high-speed I/O makes it ideal for video over IP (SMPTE ST 2110) and professional broadcast infrastructure.
Wireless and Telecom Infrastructure
In wireless base stations and radio access networks (RAN), the device delivers the signal processing bandwidth required for multi-antenna TD-LTE and 5G NR applications, including digital front-end (DFE) and remote radio head (RRH) implementations.
Power and Thermal Characteristics
One of the defining benefits of the Kintex UltraScale family is its energy efficiency. The XCKU060-1FFVA1156C delivers up to 40% lower total power consumption compared to the previous 28nm Kintex-7 generation. This is achieved through:
- Fine-grained clock gating at the CLB level
- ASIC-like placement and routing reducing switching activity
- Low-voltage operation (VCCINT nominal 0.95V)
- Multiple power-down and partial reconfiguration features
| Power Parameter |
Details |
| VCCINT (Core Voltage) |
0.922V – 0.979V |
| VCCAUX |
1.8V |
| VCCO I/O Banks |
1.2V – 3.3V (bank-configurable) |
| Power vs. Previous Gen |
Up to 40% reduction |
Development and Design Tools
The XCKU060-1FFVA1156C is fully supported by AMD Xilinx’s Vivado® Design Suite, which provides a complete RTL-to-bitstream design flow including:
- Vivado Synthesis — optimized for UltraScale timing and area
- Vivado Implementation — place and route with automatic congestion analysis
- IP Integrator (IPI) — block design with validated IP cores
- Vivado Simulator — behavioral and timing simulation
- Partial Reconfiguration — update portions of the design at runtime
The device is also footprint-compatible with Virtex® UltraScale™ devices in the same FFVA1156 package, enabling scalability to higher logic density without PCB redesign.
Ordering Information
| Field |
Details |
| Full Part Number |
XCKU060-1FFVA1156C |
| Manufacturer |
AMD (Xilinx) |
| DigiKey Part Number |
6132110 |
| Package |
1156-BBGA, FCBGA |
| Temperature Range |
0°C to 85°C (Commercial) |
| Speed Grade |
-1 |
| RoHS Status |
Compliant |
| Lead-Free |
Yes |
Part Number Variants
| Part Number |
Speed Grade |
Temperature |
Package |
| XCKU060-1FFVA1156C |
-1 |
Commercial (0–85°C) |
FFVA1156 |
| XCKU060-2FFVA1156C |
-2 |
Commercial (0–85°C) |
FFVA1156 |
| XCKU060-3FFVA1156C |
-3 |
Commercial (0–85°C) |
FFVA1156 |
| XCKU060-1FFVA1156I |
-1 |
Industrial (–40–100°C) |
FFVA1156 |
| XCKU060-2FFVA1517C |
-2 |
Commercial (0–85°C) |
FFVA1517 |
Why Choose the XCKU060-1FFVA1156C?
The XCKU060-1FFVA1156C stands out in the mid-range FPGA market for several reasons:
- Best price/performance/watt at 20nm — delivers more performance per dollar than competing mid-range FPGAs
- ASIC-class architecture — enables high-utilization, timing-closed designs without derating
- Integrated hard IP — PCIe Gen3, DDR4 controllers, and CMT blocks reduce soft logic usage
- Large ecosystem — extensive reference designs, IP cores, and community support through AMD Xilinx
- Scalable platform — footprint compatibility with Virtex UltraScale allows product line scalability
- Long-term availability — established device with stable supply chain support
Frequently Asked Questions
Q: What is the maximum user I/O count for the XCKU060-1FFVA1156C? A: The device supports up to 520 user I/Os in the FFVA1156 package.
Q: Does the XCKU060-1FFVA1156C support PCIe Gen3? A: Yes, it integrates PCIe Gen3 hard IP blocks, supporting up to x8 or x16 lane configurations.
Q: What DDR memory interfaces does it support? A: It supports DDR4 at up to 2400 Mb/s, as well as DDR3 at lower speeds.
Q: What design software should I use for XCKU060-1FFVA1156C? A: AMD Xilinx’s Vivado Design Suite is the recommended and officially supported tool chain.
Q: What is the difference between the -1C and -1I variants? A: The -1C (commercial) is rated for 0°C to 85°C, while the -1I (industrial) is rated for –40°C to 100°C. Both share the same logic specifications.
Q: Is the XCKU060-1FFVA1156C RoHS compliant? A: Yes, it is RoHS compliant and lead-free.
