Inquire: Call 0086-755-23203480, or reach out via the form below/your sales contact to discuss our design, manufacturing, and assembly capabilities.
Quote: Email your PCB files to Sales@pcbsync.com (Preferred for large files) or submit online. We will contact you promptly. Please ensure your email is correct.
Notes: For PCB fabrication, we require PCB design file in Gerber RS-274X format (most preferred), *.PCB/DDB (Protel, inform your program version) format or *.BRD (Eagle) format. For PCB assembly, we require PCB design file in above mentioned format, drilling file and BOM. Click to download BOM template To avoid file missing, please include all files into one folder and compress it into .zip or .rar format.
IPC-5701 Standard: How to Specify PCB Cleanliness for Unpopulated Boards
If you’ve ever asked yourself “how clean is clean enough?” when purchasing bare PCBs, you’re not alone. This question has plagued procurement teams and quality engineers for decades. The IPC-5701 standard was developed specifically to answer this question and give us a framework for specifying cleanliness requirements in purchasing documents.
In this guide, I’ll walk you through everything you need to know about IPC-5701, including how to use it effectively when working with your PCB fabricators, what cleanliness levels to specify, and how this standard fits into the broader family of bare board cleanliness documents.
IPC-5701 is officially titled “Users Guide for Cleanliness of Unpopulated Printed Boards.” Published by the Association Connecting Electronics Industries (IPC) in July 2003, this 32-page document provides guidance on how cleanliness issues should be approached and specified in purchasing documents.
The standard addresses four critical areas:
Levels of cleanliness and how to define them
How to specify cleanliness requirements in procurement documentation
Common locations for testing on bare boards
Sample size requirements for cleanliness testing
Unlike some IPC documents that provide hard pass/fail criteria, IPC-5701 functions as a user guide. It helps OEMs, contract manufacturers, and purchasing departments communicate cleanliness expectations to PCB fabricators in a consistent, industry-standard way.
Why Bare Board Cleanliness Matters More Than Ever
Twenty years ago, most PCB designs had generous conductor spacing. A trace-to-trace gap of 0.5mm or wider was common, and ionic contamination had plenty of room to exist without causing immediate problems.
Today’s reality is very different. Modern high-density interconnect (HDI) boards routinely feature conductor spacing of 0.1mm or less. At these dimensions, even small amounts of ionic contamination can trigger electrochemical migration (ECM) and dendritic growth.
The Electrochemical Migration Problem
When moisture combines with ionic contamination on a PCB surface under voltage bias, metal ions dissolve from the anode and migrate toward the cathode. These ions redeposit as metallic filaments called dendrites. The process can happen surprisingly fast: once conditions are right, a dendrite can bridge two conductors in a fraction of a second, dropping resistance nearly to zero.
The consequences include:
Intermittent failures that are difficult to diagnose
Complete short circuits
Corrosion of traces and pads
Reduced surface insulation resistance
Field failures that damage your reputation
Research indicates that approximately 15-25% of PCB assembly failures trace back to contamination issues originating from the bare board itself. That’s a significant percentage that can be addressed through proper cleanliness specification.
Why Legacy Specifications Fall Short
Many purchasing documents still reference the classic ionic contamination limit of 1.56 µg/cm² NaCl equivalent. This number has been in use for over 30 years, originating from military specifications developed for boards before solder mask application.
The problem? This limit was established when conductor spacing was much wider and when the primary concern was solder mask adhesion rather than electrochemical reliability. For modern high-density boards, this decades-old specification may not provide adequate protection.
IPC-5701 helps you determine what cleanliness level is actually appropriate for your application rather than blindly copying outdated specifications.
Key Topics Covered in IPC-5701
Cleanliness Levels and Classifications
IPC-5701 provides guidance on establishing appropriate cleanliness levels based on your end-use application. The standard recognizes that not every PCB requires the same level of cleanliness. A consumer electronics product with a 2-year expected lifespan has different requirements than an aerospace application expected to operate reliably for 20+ years.
The guide helps you consider factors like:
Operating environment (humidity, temperature cycling)
Expected service life
Conductor spacing and board complexity
Voltage levels in the circuit
Consequences of field failure
Specifying Requirements in Purchasing Documents
One of the most valuable aspects of IPC-5701 is its guidance on how to communicate cleanliness requirements to your PCB fabricator. Vague statements like “boards shall be clean” lead to disputes and quality issues. The standard provides a framework for writing clear, testable requirements.
Effective specifications should include:
The specific ionic contamination limit (in µg/cm² NaCl equivalent or specific ion limits)
The test method to be used (ROSE, ion chromatography, etc.)
Sample size and sampling frequency
Locations on the board to be tested
Actions required for non-conforming lots
Testing Locations on Bare Boards
Not all areas of a PCB are equally susceptible to contamination or equally important for cleanliness. IPC-5701 addresses common testing locations and their significance.
Areas of particular concern include:
Exposed laminate between fine-pitch pads
Areas adjacent to plated through-holes
Regions under planned BGA placements
Any area with tight conductor spacing
The guide helps you understand that testing the entire board surface gives an averaged result that may miss localized contamination in critical areas.
Sample Size Requirements
How many boards should you test from each lot? Testing every board is impractical and expensive. Testing too few provides inadequate statistical confidence. IPC-5701 provides guidance on establishing sampling plans that balance cost with quality assurance.
The appropriate sample size depends on:
Lot size
Your acceptable quality level (AQL)
The consequences of accepting contaminated boards
Historical performance of the fabricator
IPC-5701 and Related Bare Board Cleanliness Standards
IPC-5701 doesn’t exist in isolation. It’s part of a family of documents developed by the IPC Bare Board Cleanliness Assessment Task Group. Understanding how these documents work together helps you build a comprehensive cleanliness control program.
Standard
Title
Purpose
IPC-5701
Users Guide for Cleanliness of Unpopulated Printed Boards
Guidance on specifying cleanliness in purchasing documents
IPC-5702
Guidelines for OEMs in Determining Acceptable Levels of Cleanliness
Cleanliness Guidelines for Printed Board Fabricators
Guidance for fab shops on controlling cleanliness
IPC-5704
Cleanliness Requirements for Unpopulated Printed Boards
Hard specifications and pass/fail criteria using ion chromatography
How IPC-5701 Works with IPC-5704
While IPC-5701 is the user guide for specifying cleanliness, IPC-5704 provides the actual requirements and limits. Released in 2010, IPC-5704 moved beyond simple NaCl equivalent measurements to specify limits for individual ions using ion chromatography testing.
IPC-5704 sets tighter limits than traditional specifications. For example, the chloride limit in IPC-5704 is 0.75 µg/cm², compared to the 1.56 µg/cm² commonly specified under IPC-6012. This reflects the increased sensitivity of modern electronics to ionic contamination.
When you’re writing purchasing specifications using IPC-5701 as your guide, you’ll often reference IPC-5704 for the actual pass/fail criteria.
Relationship to IPC-6012
IPC-6012 (Qualification and Performance Specification for Rigid Printed Boards) includes basic cleanliness requirements in Section 3.9. It states that contamination level shall not exceed 1.56 µg/cm² NaCl equivalent as tested by ROSE method.
However, IPC-6012 also notes that cleanliness requirements should be specified in procurement documentation. This is where IPC-5701 becomes essential: it tells you how to write those specifications properly.
Cleanliness Testing Methods Referenced by IPC-5701
Understanding the testing methods is crucial when specifying cleanliness requirements. Different methods have different capabilities and limitations.
ROSE Testing (Resistivity of Solvent Extract)
ROSE testing is the most common method for ionic cleanliness measurement. The board is immersed in a mixture of 75% isopropyl alcohol and 25% deionized water. Ionic contaminants dissolve into the solution, changing its resistivity. The result is reported as µg/cm² NaCl equivalent.
Aspect
ROSE Testing Details
Test Method
IPC-TM-650 Method 2.3.25
Solution
75% IPA / 25% DI water
Result Format
µg/cm² NaCl equivalent
Common Limit
≤1.56 µg/cm² (≤10.06 µg/in²)
Advantages
Fast, inexpensive, widely available
Limitations
Averages over entire surface, doesn’t identify specific ions
ROSE testing has been the industry workhorse for decades, but it has limitations. It gives you a single number representing total ionic content averaged across the entire board surface. It cannot tell you what specific ions are present or where contamination is located.
Ion Chromatography
Ion chromatography (IC) provides a more detailed picture of contamination. Rather than giving a single bulk number, IC identifies and quantifies specific ionic species.
Aspect
Ion Chromatography Details
Test Method
IPC-TM-650 Method 2.3.28
Result Format
Individual ion concentrations
Ions Detected
Chloride, bromide, sulfate, nitrate, sodium, potassium, etc.
Advantages
Identifies specific contamination sources, more sensitive
Limitations
More expensive, requires specialized equipment
IC testing is particularly valuable when you need to troubleshoot contamination sources or when your application demands the highest reliability. Knowing that you have elevated chloride levels points to different corrective actions than finding elevated sulfate.
Localized Extraction Testing
For critical applications, localized extraction allows testing of specific board areas rather than the entire surface. This is particularly useful for:
Before writing any specifications, consider your end product:
What is the expected operating environment?
What is the minimum conductor spacing?
What voltage levels are present?
What is the acceptable failure rate?
What are the consequences of field failure?
A medical implant has very different requirements than a toy motor controller. IPC-5701 helps you think through these factors systematically.
Step 2: Establish Cleanliness Criteria
Based on your assessment, determine appropriate cleanliness limits. Consider:
Using IPC-5704 criteria for high-reliability applications
The traditional 1.56 µg/cm² limit may suffice for less demanding applications
Tighter limits (0.63 µg/cm² or lower) for ultra-clean requirements
Step 3: Write Clear Purchasing Specifications
Your specification should include:
Cleanliness Requirements:- Ionic contamination shall not exceed [X] µg/cm² NaCl equivalent when tested per IPC-TM-650 Method 2.3.25- Sample size: [N] boards per lot per AQL [X]- Test locations: [specify critical areas if applicable]- Non-conforming lots shall be [cleaned and retested / rejected]
Step 4: Qualify Your Suppliers
Work with your PCB fabricators to ensure they understand and can meet your requirements. Good fabricators will:
Have ionic contamination testing capability in-house
Monitor their process with regular cleanliness testing
Use DI water rinses and controlled handling procedures
Understand the sources of contamination in their process
Step 5: Implement Incoming Inspection
Even with qualified suppliers, incoming inspection provides verification:
Test samples from each lot per your sampling plan
Track results over time to identify trends
Take action immediately when limits are exceeded
Common Mistakes When Specifying Bare Board Cleanliness
Mistake 1: Using Outdated Specifications
Copying the 1.56 µg/cm² limit without considering whether it’s appropriate for your application perpetuates a specification that may be inadequate for modern high-density designs.
Mistake 2: Not Specifying the Test Method
Simply stating “boards shall be clean” is unenforceable. Always specify the test method (ROSE, IC, etc.) and reference the appropriate IPC-TM-650 method number.
Mistake 3: Ignoring Sample Size
Testing one board from a lot of 1,000 provides almost no statistical confidence. IPC-5701 provides guidance on establishing appropriate sampling plans.
Mistake 4: Averaging When You Shouldn’t
ROSE testing averages contamination across the entire board surface. A localized hot spot of contamination in a critical area may be diluted to an acceptable average while still causing reliability problems.
Mistake 5: Forgetting About Handling
Boards that leave the fabricator clean can become contaminated through improper handling during shipping, storage, or incoming inspection. Your cleanliness program needs to address the entire supply chain.
Where to Purchase IPC-5701 and Related Documents
Source
URL
Notes
IPC Store
shop.ipc.org
Official source, PDF and print available
Techstreet
techstreet.com
PDF with redline option
ANSI Webstore
webstore.ansi.org
Official ANSI distributor
Document Center
document-center.com
Multiple format options
Accuris (IHS)
store.accuristech.com
Enterprise licensing available
The current version is IPC-5701 dated July 2003. When purchasing, also consider obtaining IPC-5704 for the actual cleanliness requirements and IPC-TM-650 for the test methods.
Frequently Asked Questions About IPC-5701
What is the difference between IPC-5701 and IPC-5704?
IPC-5701 is a user guide that explains how to approach and specify cleanliness requirements in purchasing documents. IPC-5704 provides the actual cleanliness requirements and pass/fail limits using ion chromatography. Think of IPC-5701 as the “how to specify” document and IPC-5704 as the “what to specify” document.
Does IPC-5701 replace IPC-6012 cleanliness requirements?
No. IPC-6012 Section 3.9 includes basic cleanliness requirements and specifically notes that detailed requirements should be specified in procurement documentation. IPC-5701 provides guidance on how to write those procurement specifications. The two documents work together.
Is ROSE testing sufficient for modern high-density PCBs?
ROSE testing remains valuable for process control and general cleanliness verification. However, for high-reliability applications with fine conductor spacing, ion chromatography per IPC-5704 provides more detailed and actionable information. Many quality programs use ROSE for routine monitoring and IC for qualification and troubleshooting.
How often should bare board cleanliness be tested?
This depends on your quality requirements and supplier history. At minimum, test samples from each incoming lot. High-reliability applications may require 100% lot testing with documented results. IPC-5701 provides guidance on establishing appropriate sampling frequencies.
What cleanliness level should I specify for my application?
The appropriate level depends on your operating environment, conductor spacing, expected service life, and failure consequences. For general commercial applications, 1.56 µg/cm² NaCl equivalent is often adequate. For high-reliability, automotive, aerospace, or medical applications, consider the tighter limits in IPC-5704 or even more stringent custom requirements.
Surface Finishes and Their Impact on Cleanliness
The surface finish you specify for your bare boards directly impacts cleanliness outcomes. Different finishes have different contamination profiles and cleaning characteristics.
Surface Finish
Cleanliness Impact
ENIG (Electroless Nickel Immersion Gold)
Generally cleaner; no flux required during application
Clean process; watch for tarnish prevention chemistry residues
Immersion Tin
Generally clean; self-limiting reaction
When specifying extremely tight cleanliness requirements (below 0.63 µg/cm²), consider that ENIG and other non-flux-based finishes typically achieve cleaner results than HASL. Your surface finish selection should align with your cleanliness requirements.
Conclusion
IPC-5701 fills a critical gap in the electronics industry by providing guidance on how to specify bare board cleanliness requirements effectively. Rather than guessing at appropriate limits or blindly copying outdated specifications, you can use this standard to develop cleanliness requirements matched to your actual application needs.
As conductor spacing continues to shrink and reliability expectations increase, proper cleanliness specification becomes more important, not less. Whether you’re designing consumer electronics or flight-critical aerospace systems, understanding and applying IPC-5701 helps ensure that the bare boards arriving at your assembly line are clean enough to meet your reliability requirements.
The small investment in understanding this standard and implementing proper cleanliness specifications pays dividends in reduced field failures, lower warranty costs, and improved product reliability. That’s a return on investment any engineer can appreciate.
Inquire: Call 0086-755-23203480, or reach out via the form below/your sales contact to discuss our design, manufacturing, and assembly capabilities.
Quote: Email your PCB files to Sales@pcbsync.com (Preferred for large files) or submit online. We will contact you promptly. Please ensure your email is correct.
Notes: For PCB fabrication, we require PCB design file in Gerber RS-274X format (most preferred), *.PCB/DDB (Protel, inform your program version) format or *.BRD (Eagle) format. For PCB assembly, we require PCB design file in above mentioned format, drilling file and BOM. Click to download BOM template To avoid file missing, please include all files into one folder and compress it into .zip or .rar format.